DS125DF1610 Datasheet, PDF (76/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
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10.2 Layout Example
Common BGA routing techniques such as trace necking, using blind vias and buried vias, are OK as long as the
differential traces are balanced in their routing and the signals see few impedance changes. For example,
necking lengths should be the same for the differential traces and implemented symmetrically for both traces.
Figure 10 shows general Dos and Don'ts for high speed layout, such as differential trace gathering, differential
trace necking, and high speed signal and return via implementation.
Do:
'RQ¶W
Figure 10. Layout Guidelines
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