DS125DF1610 Datasheet, PDF (63/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

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Address
(Hex)
Bits
8A
7
6
5
4
3
2
1
0
8B
7
6
5
4
3
2
1
0
8C
7
6
5
4
3
2
1
0
8D
7
6
5
4
3
2
1
0
DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
Default
Value
(Hex)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 17. Channel Registers, 5A to 9B (continued)
Mode
R
R
R
R
R
R
R
R
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
EEPROM Field Name
N
PRBS_DATA_CNT7
N
PRBS_DATA_CNT6
N
PRBS_DATA_CNT5
N
PRBS_DATA_CNT4
N
PRBS_DATA_CNT3
N
PRBS_DATA_CNT2
N
PRBS_DATA_CNT1
N
PRBS_DATA_CNT0
N
UNCORR_ERR_PATT15
N
UNCORR_ERR_PATT14
N
UNCORR_ERR_PATT13
N
UNCORR_ERR_PATT12
N
UNCORR_ERR_PATT11
N
UNCORR_ERR_PATT10
N
UNCORR_ERR_PATT9
N
UNCORR_ERR_PATT8
N
UNCORR_ERR_PATT7
N
UNCORR_ERR_PATT6
N
UNCORR_ERR_PATT5
N
UNCORR_ERR_PATT4
N
UNCORR_ERR_PATT3
N
UNCORR_ERR_PATT2
N
UNCORR_ERR_PATT1
N
UNCORR_ERR_PATT0
N
RESERVED
Y
EQ_EN_HR_MODE
0
RW
Y
PFD_EN_HR_MODE
0
RW
Y
DIV_EN_HR_MODE
0
RW
Y
DIV_EN_HR_MODE
1
RW
Y
EQ_EN_MR_MODE
1
RW
Y
SD_DC_EN
0
RW
Y
EQ_SEL_LOOP_OUT
Description
PRBS bit count, 47-bit word
from channel registers 0x85
to 0x8A
This feature is reserved for
future use.
This feature is reserved for
future use.
Used with bit 2 to set Full
rate, Mid rate or Half rate EQ
bandwidth. Bit 6 is MSB. Bit 2
is LSB.
00: Full rate
01: Mid rate
11: Half rate
Used with bit 6 to set Full
rate, Mid rate or Half rate EQ
bandwidth. Bit 6 is MSB. Bit 2
is LSB.
00: Full rate
01: Mid rate
10: Alternate mid rate
11: Half rate
This feature is reserved for
future use.
This feature is reserved for
future use.
Copyright © 2014–2015, Texas Instruments Incorporated
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