DS125DF1610 Datasheet, PDF (36/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
www.ti.com
Address
(Hex)
Bits
14
7
6
5
4
3
2
1:0
15
7
6
5
4
3
2
1
0
16
7:0
17
7:0
18
7
6
5
4
3
2
1:0
19
7:6
5:0
1A
7:4
3
2
1:0
Default
Value
(Hex)
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0x7A
0x25
0
1
0
0
0
0
0
0x20
0xA
0
0
0
Table 14. Channel Registers, 0 to 1F (continued)
Mode
RW
EEPROM
Field Name
Y
EQ_SD_PRESET
RW
Y
EQ_SD_RESET
RW
Y
EQ_REFA_SEL1
RW
Y
EQ_REFA_SEL0
RW
Y
EQ_REFD_SEL1
RW
Y
EQ_REFD_SEL0
RW
N
RESERVED
RW
Y
RESERVED
RW
N
RESERVED
RW
Y
RESERVED
RW
Y
RESERVED
RW
N
DRV_PD
RW
Y
RESERVED
RW
Y
DRV_DEM1
RW
Y
DRV_DEM0
RW
Y
RESERVED
RW
Y
RESERVED
RW
N
RESERVED
RW
Y
PDIQ_SEL_DIV2
RW
Y
PDIQ_SEL_DIV1
RW
Y
PDIQ_SEL_DIV0
RW
N
RESERVED
RW
N
DRV_PD_R_EN
RW
N
RESERVED
RW
N
RESERVED
RW
Y
RESERVED
RW
Y
RESERVED
RW
Y
DRV_SEL_VCM1
RW
Y
DRV_SEL_VCM0
RW
N
RESERVED
Description
1: Forces signal detect HIGH, and
force enables the channel. Should
not be set if bit 6 is set.
0: Normal Operation.
1: Forces signal detect LOW and
force disables the channel. Should
not be set if bit 7 is set.
0: Normal Operation.
Controls the signal detect assert
levels.
Controls the signal detect de-
assert levels.
1: Powers down the high speed
driver
0: Normal operation
Degenerates the pre-driver
degeneration
00: 0 dB
01: 1 dB
10: 2 dB
11: 3 dB
These bits will force the divider
setting if 0x09[2] is set.
000: Divide by 1
001: Divide by 2
010: Divide by 4
011: Divide by 8
All other values are reserved.
1: Enables the shut down
termination resistor to be present
when the driver is powered down
with channel register 0x15[3]
0: Normal operation, resistor is
disconnected from output for
propper driver operation
This feature is reserved for future
use.
36
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