DS125DF1610 Datasheet, PDF (61/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

www.ti.com
Address
(Hex)
Bits
82
7
6
5
4
3
2
1
0
83
7:3
2
1
0
84
7
6
5
4
3
2
1
0
DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
Default
Value
(Hex)
0
Table 17. Channel Registers, 5A to 9B (continued)
Mode
RW
EEPROM Field Name
N
FREEZE_PRBS_CNTR
0
RW
N
RST_PRBS_CNTS
0
RW
N
RESERVED
0
RW
N
PRBS_PATT_OV
0
RW
N
PRBS_PATT1
0
RW
N
PRBS_PATT0
0
RW
N
PRBS_POL_OV
0
RW
N
PRBS_POL
0
R
N
RESERVED
0
R
N
PRBS_ERR_CNT10
0
R
N
PRBS_ERR_CNT9
0
R
N
PRBS_ERR_CNT8
0
R
N
PRBS_ERR_CNT7
0
R
N
PRBS_ERR_CNT6
0
R
N
PRBS_ERR_CNT5
0
R
N
PRBS_ERR_CNT4
0
R
N
PRBS_ERR_CNT3
0
R
N
PRBS_ERR_CNT2
0
R
N
PRBS_ERR_CNT1
0
R
N
PRBS_ERR_CNT0
Description
1: Freeze the PRBS bit and
error counts to allow for read
back
0: Normal operation. Both bit
and error counters are
allowed to increment if the
PRBS checker is properly
configured.
1: Reset PRBS bit and error
counts
0: Normal operation, counters
are released from reset
1: Override PRBS pattern
auto detection. Forces the
pattern checker to only lock
onto the pattern defined in
bits 3 and 2 of this register.
0: Normal operation, pattern
checker will automatically
detect the PRBS pattern
Usage is enabled with
channel reg 0x82[4]
Select PRBS pattern to be
checked 00: PRBS-7
01: PRBS-9
10: PRBS-15
11: PRBS-31
1: Override PRBS pattern
auto polarity detection.
Forces the pattern checker to
only lock onto the polarity
defined in bit 0 of this
register.
0: Normal operation, pattern
checker will automatically
detect the PRBS pattern
polarity
Usage is enabled with
channel register 0x82[1]
0: Forced polarity = true
1 - Forced polarity = inverted
PRBS error count MSB
PRBS error count LSB
Copyright © 2014–2015, Texas Instruments Incorporated
Product Folder Links: DS125DF1610
Submit Documentation Feedback
61