DS125DF1610 Datasheet, PDF (41/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

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Address
(Hex)
Bits
2C
7
6
5
4
3
2
1
0
2D
7
6
5
4
3
2
1
0
2E
7:0
2F
7
6
5
4
3
2
1
0
DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
Table 15. Channel Registers, 20 to 39 (continued)
Default
Value
(Hex)
1
Mode
RW
EEPROM
Field Name
N
RELOAD_DFE_TAPS
1
RW
Y
VEO_SCALE
1
RW
Y
DFE_SM_FOM1
1
RW
Y
DFE_SM_FOM0
0
RW
Y
DFE_ADAPT_COUNTER3
0
RW
Y
DFE_ADAPT_COUNTER2
1
RW
Y
DFE_ADAPT_COUNTER1
0
RW
Y
DFE_ADAPT_COUNTER0
0
RW
Y
PD_SCP
0
RW
Y
SD_EN_FAST_OOB
0
RW
Y
SD_REF_HIGH
0
RW
Y
SD_GAIN
0
RW
Y
EQ_BST_OV
1
RW
Y
DRV_SEL_VOD2
1
RW
Y
DRV_SEL_VOD1
1
RW
Y
DRV_SEL_VOD0
0
RW
N
RESERVED
0
RW
Y
RATE1
0
RW
Y
RATE0
1
RW
Y
SUBRATE1
1
RW
Y
SUBRATE0
0
RW
Y
INDEX_OV
1
RW
Y
EN_PPM_CHECK
1
RW
Y
EN_FLD_CHECK
0
RWSC
N
CTLE_ADAPT
Description
1: Reload DFE taps from last
adapted value
1: Scale VEO based on EOM
vertical range
0: Manual control of vertical
range
00: not valid
01: SM uses only HEO
10: SM uses only VEO
11: SM uses both HEO and
VEO
DFE look-beyond count.
1: Power down the short
circuit protection for the high
speed driver outputs
0: Normal operation, short
circuit protection is enabled
for the high speed driver
outputs
Feature is reserved for future
use.
Feature is reserved for future
use.
Feature is reserved for future
use.
Allow override control of the
EQ setting by writing to
channel register 0x03. Not
recommended for normal
operation.
Used in conjunction with
0x0D[5:4] to control the VOD
levels of the high speed
drivers
4 bits determine standard.
0x6: 11.5 Gbps
0x7: 12.5, 6.5, 3.125 Gbps
0x8: 9.8304, 4.9152, 2.4576
Gbps
0x9: 6.144, 3.072 Gbps
0xA: 10, 5, 2.5 Gbps
0xB: 10.3125, 1.25
If this bit is set to 1, reg 0x13
is to be used as a 5 bit index
to the [31:0] array of EQ
settings.
1: PPM check to be used as
a qualifier when performing
lock detect
1: False lock detector is used
as a qualifier when
performing lock detect
Starts CTLE adaption, self
clearing
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