DS125DF1610 Datasheet, PDF (1/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

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DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
DS125DF1610 9.8 to 12.5 Gbps 16-Channel Retimer
1 Features
•1 Pin-Compatible Family
– DS150DF1610: 12.5 to 15 G
– DS125DF1610: 9.8 to 12.5 G
– DS110DF1610: 8.5 to 11.3 G
• 4x4 Analog Cross Point Switch for Each Quad
• Fully Adaptive CTLE
• Self tuning DFE, with Optional Continuous
Adaption
• Configurable VGA
• Adjustable Transmit V_OD
• Adjustable 3-tap Transmit FIR Filter
• On-chip AC Coupling on Receive Inputs
• Locks to Half/Quarter/Eighth Data Rates for
Legacy Support
• On-chip Eye Monitor(EOM), PRBS Checker,
Pattern Generator
• Supports JTAG Boundary Scan
• Programmable Output Polarity Inversion
• Input Signal Detection, CDR Lock Detection
• Single 2.5 V ±5% Power Supply
• SMBus Based Register Configuration
• Optional EEPROM Configuration
• 15 mm × 15 mm, 196-pin FCBGA Package
• Operating Temp Range : –20°C to +85°C
2 Applications
• SFF-8431
• CPRI
• 10G/40G Ethernet
• Backplanes
3 Description
The DS125DF1610 is a sixteen-channel multi-rate
retimer with integrated signal conditioning features.
The device includes a fully adaptive Continuous Time
Linear Equalizer (CTLE), Decision Feedback
Equalizer (DFE), clock and data recovery (CDR), and
a transmit FIR filter to enhance the reach and
robustness over long, lossy, crosstalk impaired high
speed serial links to achieve BER < 1×10^-15.
Each channel of the DS125DF1610 independently
locks to serial data at 9.8 to 12.5 Gbps and the divide
by 2, 4 and 8 sub-multiples. A simple external
oscillator (±100ppm) that is synchronous or
asynchronous with the incoming data stream is used
as a reference clock. Integrated 4x4 cross point
switches allow for full non-blocking routing or
broadcasting within each quad of the DS125DF1610.
Programmable transmit FIR filter offers control of the
pre-cursor, main tap and post-cursor for transmit
equalization. The fully adaptive receive equalization
(CTLE and DFE) enables longer distance
transmission in lossy copper interconnects and
backplanes with multiple connectors.
A non-disruptive mission mode eye-monitor feature
allows link monitoring internal to the receiver. The
built-in PRBS generator and checker compliment the
internal diagnostic features to complete standalone
BERT measurements. Built-in JTAG enables
manufacturing tests.
Device Information ⁽¹⁾
PART NUMBER PACKAGE
BODY SIZE NOM
DS125DF1610
FCBGA (196) 15.00 mm x 15.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet
Simplified Schematic
DS125DF1610
RX_0A_P
TX_0A_P
100nF
. ^RX.^_0A_N
..
..
RX_7B_P
TX_0A_._N
.
.
TX_7B_P
.
.
100nF
. 100nF
2.5V or 3.3V
RX_7B_N
TDI_IO
TDO_IO
TRST_IO
TMS_IO
TCK_IO
TX_7B_N
__________
IN__T_E_R_R____IO_
RESET_IO
SDA_IO
SCL_IO
100nF
2k: 2k: 2k: 2k:
25 MHz
1F
REF_CLK_P
CLK_MON_P
2.5V
REF_CLK_N
1F
CLK_MON_N
EN_SMB
22 F
(1x)
0.1 F
(8x)
VDD
READ_EN
ADDR0
GND
ADDR1
1k: 1k: 1k: 1k:
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.