DS125DF1610 Datasheet, PDF (27/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

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DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
Programming (continued)
Table 11. Channel Select Global Registers (continued)
GLOBAL
REGISTER
0xFC
BIT
DESCRIPTION
7
Channel 7– Quad 1 Channel 3 – Cross Point Ch D
6
Channel 6– Quad 1 Channel 2 – Cross Point Ch C
5
Channel 5– Quad 1 Channel 1 – Cross Point Ch B
4
Channel 4– Quad 1 Channel 0 – Cross Point Ch A
3
Channel 3– Quad 0 Channel 3 – Cross Point Ch D
2
Channel 2– Quad 0 Channel 2 – Cross Point Ch C
1
Channel 1– Quad 0 Channel 1 – Cross Point Ch B
0
Channel 0 – Quad 0 Channel 0 – Cross Point Ch A
CDR/TX PIN ASSIGNMENT
TX_3B
TX_3A
TX_2B
TX_2A
TX_1B
TX_1A
TX_0B
TX_0A
GLOBAL REGISTER
0xFF
Table 12. Shared-Channel Select Global Register
BIT
DESCRIPTION
7:2
These bits are not used and default to 0
1
1: Broadcast write to all channels, 0xFF[0] must be set to 1.
0: Normal operation, select channel register as defined in 0xFC and 0xFD
0
1: Select Channel Registers
0: Select Share Registers
Address
(Hex)
Bits
0
7
6
5
4
3
2:0
1
7
6
5
4
3
2
1
0
2
7
6
5
Default
Value
(Hex)
0
0
0
0
0
0
0
1
1
1
0
0
0
1
0
0
0
Table 13. Shared Registers
Mode
R
R
R
R
R
R
R
R
R
R
R
R
R
R
RW
RW
RW
EEPROM
Field Name
N
SMBus_Addr3
N
SMBus_Addr2
N
SMBus_Addr1
N
SMBus_Addr0
Y
RESERVED
N
RESERVED
N
Version2
N
Version1
N
Version0
N
Device_ID4
N
Device_ID3
N
Device_ID2
N
Device_ID1
N
Device_ID0
N
RESERVED
Y
REFCLK_SEL1
Y
REFCLK_SEL0
4:0
0
RW
N
RESERVED
3
7:3
0
R
N
RESERVED
2
0
R
Y
RESERVED
1:0
0
R
N
RESERVED
Description
SMBus Address
Strapped 7-bit addres is 0x18 +
SMBus_Addr[3:0]
Device version
Device ID code for
DS125DF1610
Sets the REFCLK input
frequency
00: 25 MHz
01: 125 MHz
10: 312.5MHz
11: Reserved
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