DS125DF1610 Datasheet, PDF (25/81 Pages) Texas Instruments – 9.8 to 12.5 Gbps 16-Channel Retimer

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DS125DF1610
SNLS482A – APRIL 2014 – REVISED DECEMBER 2015
Device Functional Modes (continued)
7.4.2.2 SMBus Address Configuration
In either SMBus mode the DS125DF1610 must be assigned a unique SMBus address.
The DS125DF1610 can be configured to respond to one of the sixteen SMBus addresses listed in the Table 10
below. GPIO1 and GPIO0 are configured to be four level inputs immediately after the device powers on. Logic 0
can be set by tying the pin to ground through a ≤1kΩ resistor. Logic R is set by tying the pin to ground through a
20kΩ resistor. Logic F is set by floating the pin. Logic 1 is set by tying the pin to VCC = 2.5V through a ≤1kΩ
resistor.
ADDR1(GPIO1) (pin D5)
0
0
0
0
R
R
R
R
F
F
F
F
1
1
1
1
Table 10. SMBus Address Configuration
ADDR0(GPIO0) (pin B6)
0
R
F
1
0
R
F
1
0
R
F
1
0
R
F
1
7-BIT ADDRESS
7’h18
7’h19
7’h1A
7’h1B
7’h1C
7’h1D
7’h1E
7’h1F
7’h20
7’h21
7’h22
7’h23
7’h24
7’h25
7’h26
7’h27
8-BIT WRITE ADDRESS
0x30
0x32
0x34
0x36
0x38
0x3A
0x3C
0x3E
0x40
0x42
0x44
0x46
0x48
0x4A
0x4C
0x4E
When an SMBus device is addressed for reading or writing a bit is appended to the address a the least
significant bit space. This bit is set to 0 for a write or to 1 for a read.
7.4.3 Device Configuration in SMBus Slave Mode
The configurable settings of the DS125DF1610 may be set independently for each channel at any time after
power up using the SMBus. A register write is accomplished when the controller sends a START condition on the
SMBus followed by the Write address of the DS125DF1610 to be configured. After sending the Write address of
the DS125DF1610, the controller sends the register address byte followed by the register data byte. The
DS125DF1610 acknowledges each byte written to the controller according to the data link protocol of the SMBus
Version 2.0 Specification. See this specification for additional information on the operation of the SMBus.
There are 3 types of device registers in the DS125DF1610. These are the global registers, shared registers and
the channel registers. The global registers are programmed to access the various channel registers or the shared
registers. The shared registers control or allow observation of settings which affect the operation of all channels
of the DS125DF1610 at the greater device level.
The channel registers are used to set all the configuration settings of the DS125DF1610. They provide
independent control for each channel of the DS125DF1610 for all the settable device characteristics. Any
registers not described in the tables that follow should be treated as reserved. The user should not try to write
new values to these registers. The user-accessible registers described in the tables that follow provide a
complete capability for customizing the operation of the DS125DF1610 on a channel-by-channel basis.
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