TLK10081 Datasheet, PDF (55/62 Pages) Texas Instruments – 10Gbps 1-8 CHANNEL MULTI-RATE SERIAL LINK AGGREGATOR

TLK10081
www.ti.com
SLLSEE9 – NOVEMBER 2013
7.7 Reference and Output Clock Characteristics (REFCLK0P/N, REFCLK1P/N)
PARAMETER
F
Frequency
FHS_offset Accuracy
FLS_offset
DC
V_ID
C_IN
R_IN
Accuracy to LS serial data
Duty cycle
Differential input voltage
Input capacitance
Differential input impedance
TEST CONDITIONS
Relative to nominal HS serial data rate
Relative to incoming HS serial data rate
Synchronous (Multiple/Divide)
High time
MIN
122.88
–100
–200
0
45%
250
TYP
0
50%
100
MAX
425
100
200
0
55%
2000
1
UNIT
MHz
ppm
ppm
mV_pp
pF
Ω
7.8 Differential Output Clock Characteristics (CLKOUTAP/CLKOUTBP/N)
V_OD
T_RISE
R_TERM
F
PARAMETER
Differential output voltage
Output rise time
Output termination
Output frequency
TEST CONDITIONS
Peak to peak
10% to 90%, 2pF lumped capacitive load, AC-
coupled
CLKOUTA/BP/N to DVDD
MIN
1000
0
TYP
MAX
2000
350
UNIT
mV_pp
ps
50
Ω
500 MHz
7.9 LVCMOS Electrical Characteristics (VDDO)
PARAMETER
TEST CONDITIONS
V_OH
High-level output voltage
V_OL
Low-level output voltage
I_OH = 2 mA, Driver enabled (1.8V)
I_OH = 2 mA, Driver enabled (1.5V)
I_OL = –2 mA, Driver enabled (1.8V)
I_OL = –2 mA, Driver enabled (1.5V)
V_IH
High-level input voltage
V_IL
I_IH, I_IL
I_OZ
C_IN
Low-level input voltage
Receiver only
Driver only
Driver/Receiver with Pullup/Pulldown
Input capacitance
Low/High input current
Driver disabled
Driver disabled with Pull Up/Down
enabled
MIN TYP
MAX UNIT
VDDO –
0.45
0.75 ×
VDDO
VDDO
V
VDDO
0
0.45
0
0.25 × ^V
VDDO
0.65 ×
VDDO
VDDO +
0.3
V
–0.3
0.35 ×
VDDO
V
±170 µA
±25
µA
±195
3 pF
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ELECTRICAL CHARACTERISTICS
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