English
Language : 

TLK10081 Datasheet, PDF (41/62 Pages) Texas Instruments – 10Gbps 1-8 CHANNEL MULTI-RATE SERIAL LINK AGGREGATOR
TLK10081
www.ti.com
SLLSEE9 – NOVEMBER 2013
Table 6-35. LN_DATA_SRC_CONTROL
Register Address:0x1B SPACER Default: 0x3020(1)
Bit(s)
Name
Description
Access
15:14
LN_RX_DIV_RATE[1:0]
Divided rate control on the receive side (Default 2’b00)
RW
LS divided rate selection on receive path. Settings are applicable for the lanes
selected through LS_LN_CFG_EN[3:0] (6.15:14)
13
LN_RX_CTC_EN
LS CTC control on receive path. Settings are applicable for the lanes selected
RW
through LS_LN_CFG_EN[3:0] (6.15:14)
0 = CTC disabled for the selected lane on receive path
1 = CTC enabled for the selected lane on receive path (Default 1’b1)
12:11
LN_RX_DATA_SRC_SEL[1:0] Lane data source selection. Selects the data for selected lane that will be sent
RW
out on LS receive out. Settings are applicable for the lanes selected through
LS_LN_CFG_EN[3:0] (6.15:14)
0x = LS input
10 = HS input of primary macro(Default 2’b10)
11 = HS input of alternate macro
10:8
LN_RX_DATA_LANE_SEL[2:0] Lane selection for the data source selected through LN_RX_DATA_SRC_SEL.
RW
Selects the data for selected lane that will be sent out on LS receive out.
Settings are applicable for the lanes selected through LS_LN_CFG_EN[3:0]
(6.15:14)
000 = LS Lane 0 input
001 = LS Lane 1 input
010 = LS Lane 2 input
011 = LS Lane 3 input
100 = LS Lane 4 input
101 = LS Lane 5 input
110 = LS Lane 6 input
111 = LS Lane 7 input
7:6
LN_TX_DIV_RATE[1:0]
Divided rate control on the receive side (Default 2’b00)
RW
LS divided rate selection on transmit path. Settings are applicable for the lanes
selected through LS_LN_CFG_EN[3:0] (6.15:14) and MACRO_ACCESS(0.13)
5
LN_TX_CTC_EN
LS CTC control on transmit path. Settings are applicable for the lanes selected
RW
through LS_LN_CFG_EN[3:0] (6.15:14)
0 = CTC disabled for the selected lane on transmit path
1 = CTC enabled for the selected lane on transmit path (Default 1’b0)
4:3
LN_TX_DATA_SRC_SEL[4:3] LS lane data source selection. Selects the data for selected lane that will be
RW
sent out on HS transmit out. Settings are applicable for the lanes selected
through LS_LN_CFG_EN[3:0] (6.15:14)
0x = LS input
10 = HS input (Default 2’b10)
11 = HS input of alternate macro
2:0
LN_TX_DATA_SRC_SEL[2:0] Lane selection for the data source selected through
RW
LN_TX_DATA_SRC_SEL[4:3]. Selects the data for selected lane that will be
sent out on HS transmit out. Settings are applicable for the lanes selected
through LS_LN_CFG_EN[3:0] (6.15:14)
000 = LS Lane 0 input
001 = LS Lane 1 input
010 = LS Lane 2 input
011 = LS Lane 3 input
100 = LS Lane 4 input
101 = LS Lane 5 input
110 = LS Lane 6 input
111 = LS Lane 7 input
(1) Default for ln0 is 0x3020, ln1 is 0x3121, ln2 is 0x3222, ln 3 is 0x3323. Default for ln4 is 0x3424, ln5 is 0x3525, ln6 is 0x3626, ln7 is
0x3727.
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TLK10081
PROGRAMMERS REFERENCE
41