TLK10081 Datasheet, PDF (4/62 Pages) Texas Instruments – 10Gbps 1-8 CHANNEL MULTI-RATE SERIAL LINK AGGREGATOR

TLK10081
SLLSEE9 – NOVEMBER 2013
M
U
X
8b/10b
M
U
X
8b/10b
M
U
X
8b/10b
M
U
X
8b/10b
M
U
X
8b/10b
M
U
X
8b/10b
M
U
X
8b/10b
M
U
X
8b/10b
SKEW
SKEW
SKEW
SKEW
SKEW
SKEW
SKEW
SKEW
TLK10081 RX
FIFO
FIFO
FIFO
FIFO
FIFO
FIFO
D
MARKER
E
REPLACE M
M
U
U
LANE
X
X
ORDERING
M
8b/10b U
X
M
DSCR U
X
FIFO
FIFO
Ch_sync
JOG
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Figure 2-2. A Simplified Block Diagram of the TLK10081 (RX)
2.2 Package
A 13-mm x 13-mm, 144-pin PBGA package with a ball pitch of 1 mm is used. The device pin-out is as
shown in Figure 2-3 and is described in detail in Table 2-1 and Table 2-2.
Figure 2-3. The Pin-Out of the TLK10081
4
PHYSICAL CHARACTERISTICS
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