TLK10081 Datasheet, PDF (44/62 Pages) Texas Instruments – 10Gbps 1-8 CHANNEL MULTI-RATE SERIAL LINK AGGREGATOR

TLK10081
SLLSEE9 – NOVEMBER 2013
Table 6-44. VS_TX_IDLE_P_CHAR
Register Address:0x8004 SPACER Default: 0x02BC
Bit(s) Name
Description
9:0
TX_IDLE_P[9:0]
TX Idle P character (Default 10’h2BC)
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Access
RW
Table 6-45. VS_TX_IDLE_N_CHAR
Register Address:0x8005 SPACER Default: 0x02BC
Bit(s) Name
Description
9:0
TX_IDLE_N[9:0]
TX Idle N character (Default 10’h2BC)
Access
RW
Table 6-46. VS_RX_IDLE_P_CHAR
Register Address:0x8006 SPACER Default: 0x02BC
Bit(s)
Name
Description
9:0
RX_IDLE_P[9:0]
RX Idle P character (Default 10’h2BC)
Access
RW
Table 6-47. VS_RX_IDLE_N_CHAR
Register Address:0x8007 SPACER Default: 0x02BC
Bit(s) Name
Description
9:0
RX_IDLE_N[9:0]
RX Idle N character (Default 10’h2BC)
Access
RW
Table 6-48. VS_TX_SCR_CONTROL
Register Address:0x8009 SPACER Default: 0xFC00
Bit(s) Name
Description
15:2
RESERVED
For TI use only (Default 14'b11111100000000)
1
TX_SCR_20_EN
1 = Enable 20 bit scrambler (post-encoder) on transmit side(Default 1’b0)
0 = Disable 20 bit scrambler (post-encoder) on transmit side
0
TX_SCR_16_EN
1 = Enable 16 bit scrambler (pre-encoder) on transmit side. Seed can be set
through 0x800C and 0x800D (Default 1’b0)
0 = Disable 16 bit scrambler (pre-encoder) on transmit side
Access
RW
RW
RW
Table 6-49. VS_TX_SEED_CONTROL_1
Register Address:0x800C SPACER Default: 0x0000
Bit(s) Name
Description
15:0
TX_SCR_SEED[31:16]
[31:16] bits of 32 bit Tx scrambler seed. TX_SCR_SEED[31:0] must be set to a
non-zero value for scrambler to work properly (Default 16’h0000).
Access
RW
Table 6-50. VS_TX_SEED_CONTROL_0
Register Address:0x800D SPACER Default: 0x01FC
Bit(s) Name
Description
15:0
TX_SCR_SEED[31:16]
[15:0] bits of 32 bit Tx scrambler seed. Bit 0 always set to 1’b0.
TX_SCR_SEED[31:0] must be set to a non-zero value for scrambler to work
properly (Default 16’h01FC).
Access
RW
Table 6-51. VS_TX_POLY_CONTROL_1
Register Address:0x800E SPACER Default: 0x0000
Bit(s) Name
Description
15:0
TX_SCR_SEED[31:16]
[31:16] bits of 32 bit Tx scrambler polynomial (Default 16’h0000).
Access
RW
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