K522H1HACF-B050 Datasheet, PDF (54/94 Pages) Samsung semiconductor – MCP Specification

K522H1HACF-B050
datasheet
Rev. 1.0
MCP Memory
8.0 AC TIMMING PARAMETERS & SPECIFICATIONS
Parameter
Clock cycle time
CL=3
Row cycle time
Row active time
RAS to CAS delay
Row precharge time
Row active to Row active delay
Write recovery time
Last data in to Active delay
Last data in to Read command
Col. address to Col. address delay
Clock high level width
Clock low level width
DQ Output data access time
from CK / CK
DQS Output data access time
CL=3
CL=3
Data strobe edge to output data edge
Read Preamble
CL=3
Read Postamble
CK to valid DQS-in
DQS-in setup time
DQS-in hold time
DQS-in high level width
DQS-in low level width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
DQS-in cycle time
Address and Control
Input setup time
Address and Control
Input hold time
Address & Control input pulse width
DQ & DM setup time to DQS
DQ & DM hold time to DQS
DQ & DM input pulse width
fast slew rate
slow slew rate
fast slew rate
slow slew rate
fast slew rate
slow slew rate
fast slew rate
slow slew rate
DQ & DQS low-impedence time from CK / CK
DQ & DQS high-impedence time from CK / CK
DQS write postamble time
Symbol
t_CK
t_RC
t_RAS
t_RCD
t_RP
t_RRD
t_WR
t_DAL
t_CDLR
t_CCD
t_CH
t_CL
t_AC
t_DQSCK
t_DQSQ
t_RPRE
t_RPST
t_DQSS
t_WPRES
t_WPREH
t_DQSH
t_DQSL
t_DSS
t_DSH
t_DSC
t_IS
t_IH
t_IPW
t_DS
t_DH
t_DIPW
t_LZ
t_HZ
t_WPST
DDR400
Min
Max
5
55
40
70,000
15
15
10
12
-
2
1
0.45
0.55
0.45
0.55
2
5
2
5
0.4
0.9
1.1
0.4
0.6
0.75
1.25
0
0.25
0.4
0.6
0.4
0.6
0.2
0.2
0.9
1.1
0.9
1.1
0.9
1.1
2.2
0.48
0.58
0.48
0.58
1.2
1.0
5
0.4
0.6
Unit
Note
ns
1,2
ns
ns
ns
ns
ns
ns
-
3
tCK
tCK
tCK
tCK
ns
4
ns
ns
tCK
tCK
tCK
ns
5
tCK
tCK
tCK
tCK
tCK
tCK
7
ns
8
ns
7
8
6,7
ns
6,8
ns
6,7
6,8
ns
ns
ns
tCK
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