M16C6N4 Datasheet, PDF (75/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6N4)
8. Clock Generating Circuit
Processor Mode Register 2 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
00
0
Symbol
PM2
Address
001Eh
After Reset
XXX00000b
Bit Symbol
Bit Name
Function
RW
Specifying Wait when
0 : 2 waits
PM20 ^{Accessing SFR at PLL}
1 : 1 wait
RW
Operation ⁽²⁾
-
(b1)
Reserved Bit
Set to "0"
RW
PM22
-
(b4-b3)
WDT Count Source
Protective Bit ^{(3) (4)}
Reserved Bit
0 : CPU clock is used for the
watchdog timer count source
1 : On-chip oscillator clock is used for ^RW
the watchdog timer count source
Set to "0"
RW
-
(b7-b5)
Nothing is assigned. When write, set to "0".
When read, their contents are indeterminate.
-
NOTES:
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
2. The PM20 bit become effective when the PLC07 bit in the PLC0 register is set to "1" (PLL on). Change the PM20
bit when the PLC07 bit is set to "0" (PLL off). Set the PM20 bit t "0" (2 waits) when PLL clock > 16MHz.
3. Once this bit is set to "1", it cannot be set to "0" in a program.
4. Setting the PM22 bit to "1" results in the following conditions:
The on-chip oscillator starts oscillating, and the on-chip oscillator clock becomes the watchdog timer count source.
The CM10 bit in the CM1 register is disabled against write. (Writing a "1" has no effect, nor is stop mode entered.)
The watchdog timer does not stop when in wait mode or hold state.
Figure 8.7 PM2 Register
PLL Control Register 0 ⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0 01
Symbol
PLC0
Address
001Ch
After Reset
0001X010b
Bit Symbol
Bit Name
Function
RW
b2 b1 b0
PLC00
0 0 0 : Do not set a value
RW
0 0 1 : Multiply by 2
0 1 0 : Multiply by 4
PLL Multiplying Factor
PLC01 _{Select Bit (2)}
0 1 1 : Multiply by 6 ⁽⁴⁾
100:
RW
PLC02
101:
110:
111:
Do not set a value
RW
-
Nothing is assigned. When write, set to "0".
(b3) _{When read, its content is indeterminate.}
-
-
(b4)
Reserved Bit
Set to "1"
RW
-
(b6-b5) ^{Reserved Bit}
Set to "0"
RW
PLC07 Operation Enable Bit ⁽³⁾
0 : PLL Off
1 : PLL On
RW
NOTES:
1. Write to this register after setting the PRC0 bit in the PRCR register to "1" (write enable).
2. This bit can only be modified when the PLC07 bit = 0 (PLL turned off). The value once written to this bit
cannot be modified.
3. Before setting this bit to "1", set the CM07 bit in the CM0 register to "0" (main clock), set the CM17 to
CM16 bits in the CM1 register to "00b" (main clock undivided mode), and set the CM06 bit in the CM0
register to "0" (CM16 and CM17 bits enable).
4. Multiply by 6 is available Normal-ver. only.
Figure 8.8 PLC0 Register
Rev.2.30 Oct 24, 2005 page 57 of 376
REJ09B0009-0230