M16C6N4 Datasheet, PDF (399/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/6N Group (M16C/6N4) Hardware Manual
Rev. Date
2.00 Nov. 10, 2004
Page
219
223
224
225
231
233
234
251
252
255
256
257
258
260
261
262
265
266
271
273
274
276
Description
Summary
Figure 19.8 C0STR and C1STR Registers (upper): NOTE 2 is added.
19.5 Operational Modes
• 1st line: "three operational modes" is revised to "four operational modes".
• 5th line: "CAN Interface Sleep Mode" is added.
Figure 19.12 Transition Between Operational Modes is revised.
19.5.1 CAN Reset/Initialization Mode is revised.
19.5.2 CAN Operation Mode is revised.
19.5.3 CAN Sleep Mode is revised.
19.5.4 CAN Interface Sleep Mode is added.
19.5.5 Bus Off State is revised.
19.12 Return from Bus Off Function is revised.
19.14 Listen-Only Mode
• last line: "When listen-only mode is selected, do not request the transmission." is added.
Figure 19.20 Timing of Receive Data Frame Sequence: Waveform of RecState bit is revised.
19.15.1 Reception: (4) (5) are revised.
Figure 19.21 Timing of Transmit Sequence
• The position of the number corresponding to the text is revised.
19.15.2 Transmission: (1) to (4) are revised.
21.2.1 ROM Code Protect Function is revised.
21.2.2 ID Code Check Function is revised.
Figure 21.2 ROMCP Register is revised.
Figure 21.4 (upper) FMR0 Register: The value of After Reset is revised.
21.3.3.1 FMR00 Bit is revised.
21.3.3.8 FMR11 Bit is revised.
21.3.3.9 FMR16 Bit is revised.
Figure 21.5 Setting and Resetting of EW0 Mode is revised.
Figure 21.6 Setting and Resetting of EW1 Mode: NOTE 3 is revised.
Figure 21.7 Processing Before and After Low Power Dissipation Mode: NOTE 4 is added.
21.3.4.12 Low Power Dissipation Mode and On-chip Oscillator Low Power Dissipation
Mode is revised.
Table 21.4 Software Commands: NOTE 2 is deleted.
21.3.5.4 Program Command (40h)
• From bottom to 3rd line: "read command" is revised to "read array command".
Figure 21.11 Read Lock Bit Status Command
• "Locked", "Not locked" are revised to "Block is locked", "Block is not locked".
21.3.7.1 Sequencer Status (SR7 and FMR00 Bits) is revised.
Table 21.7 Pin Functions for Standard Serial I/O Mode
• "VCC" is revised to "VCC1", and "VCC2" is added.
• VCC1, VCC2, VSS: VCC apply condition is added.
Figure 21.14 Pin Connections for Standard Serial I/O Mode (2) is added.
____________
Figure 21.16 Circuit Application in Standard Serial I/O Mode 2: "RESET" is added.
Table 21.8 Pin Functions for CAN I/O Mode
• "VCC" is revised to "VCC1", and "VCC2" is added.
• VCC1, VCC2, VSS: VCC apply condition is added.
C-5