M16C6N4 Datasheet, PDF (256/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6N4)
20. Programmable I/O Ports
20. Programmable I/O Ports
The programmable input/output ports (hereafter referred to simply as I/O ports) consist of 87 lines P0 to P10
(except P8_5). Each port can be set for input or output every line by using a direction register, and can also
be chosen to be or not be pulled high every 4 lines. P8_5 is an input-only port and does not have a pull-up
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resistor. Port P8_5 shares the pin with NMI, so that the NMI input level can be read from the P8_5 bit in the
P8 register.
Figures 20.1 to 20.5 show the I/O ports. Figure 20.6 shows the I/O pins.
Each pin functions as an I/O port, a peripheral function input/output pin or a bus control pin.
For details on how to set peripheral functions, refer to each functional description in this manual. If any pin is
used as a peripheral function input or D/A converter output pin, set the direction bit for that pin to “0” (input
mode). Any pin used as an output pin for peripheral functions other than the D/A converter is directed for
output no matter how the corresponding direction bit is set.
When using any pin as a bus control pin, refer to 7.2 Bus Control.
20.1 PDi Register (i = 0 to 10)
Figure 20.7 shows the PDi register.
This register selects whether the I/O port is to be used for input or output. The bits in this register correspond
one for one to each port.
During memory expansion and microprocessor modes, the PDi registers for the pins functioning as bus
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control pins (A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA, and
BCLK) cannot be modified.
No direction register bit for P8_5 is available.
20.2 Pi Register (i = 0 to 10)
Figure 20.8 shows the Pi register.
Data input/output to and from external devices are accomplished by reading and writing to the Pi register.
The Pi register consists of a port latch to hold the input/output data and a circuit to read the pin status. For
ports set for input mode, the input level of the pin can be read by reading the corresponding Pi register, and
data can be written to the port latch by writing to the Pi register.
For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and data
can be written to the port latch by writing to the Pi register. The data written to the port latch is output from
the pin. The bits in the Pi register correspond one for one to each port.
During memory expansion and microprocessor modes, the Pi registers for the pins functioning as bus
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control pins (A0 to A19, D0 to D15, CS0 to CS3, RD, WRL/WR, WRH/BHE, ALE, RDY, HOLD, HLDA, and
BCLK) cannot be modified.
20.3 PURj Register (j = 0 to 2)
Figure 20.9 shows the PURj register.
The PURj register bits can be used to select whether or not to pull the corresponding port high in 4-bit unit.
The port selected to be pulled high has a pull-up resistor connected to it when the direction bit is set for input
mode.
However, the pull-up control register has no effect on P0 to P3, P4_0 to P4_3, and P5 during memory
expansion and microprocessor modes. Although the register contents can be modified, no pull-up resistors are
connected.
Rev.2.30 Oct 24, 2005 page 238 of 376
REJ09B0009-0230