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M16C6N4 Datasheet, PDF (20/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES
Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6N4)
1. Overview
1.2 Performance Outline
Table 1.1 lists a performance outline of M16C/6N Group (M16C/6N4).
Table 1.1 Performance Outline of M16C/6N Group (M16C/6N4)
CPU
Item
Normal-ver.
Number of Basic Instructions 91 instructions
Performance
T/V-ver.
Minimum Instruction
41.7ns (f(BCLK) = 24MHz,
50.0ns (f(BCLK) = 20MHz,
Execution Time
Operation Mode
1/1 prescaler, without software wait) 1/1 prescaler, without software wait)
Single-chip, memory expansion and microprocessor modes
Peripheral
Function
Address Space
Memory Capacity
Port
Multifunction Timer
1 Mbyte
See Table 1.2 Product List
Input/Output: 87 pins, Input: 1 pin
Timer A: 16 bits ✕ 5 channels
Timer B: 16 bits ✕ 6 channels
Three-phase motor control circuit
Serial Interface
3 channels
Clock synchronous, UART, I2C-bus (1), IEBus (2)
1 channel
Clock synchronous
A/D Converter
D/A Converter
DMAC
CRC Calculation Circuit
CAN Module
Watchdog Timer
Interrupt
10-bit A/D converter: 1 circuit, 26 channels
8 bits ✕ 2 channels
2 channels
CRC-CCITT
2 channels with 2.0B specification
15 bits ✕ 1 channel (with prescaler)
Internal: 31 sources, External: 9 sources
Software: 4 sources, Priority level: 7 levels
Clock Generating Circuit
4 circuits
• Main clock oscillation circuit (*)
• Sub clock oscillation circuit (*)
• On-chip oscillator
• PLL frequency synthesizer
(*) Equipped with a built-in feedback resistor
Electrical
Oscillation Stop Detection Main clock oscillation stop and re-oscillation detection function
Function
Supply Voltage
VCC = 3.0 to 5.5V (f(BCLK) = 24MHz, VCC = 4.2 to 5.5V (f(BCLK) = 20MHz,
Characteristics
1/1 prescaler, without software wait) 1/1 prescaler, without software wait)
Power
Mask ROM 20mA (f(BCLK) = 24MHz, 18mA (f(BCLK) = 20MHz,
Consumption
PLL operation, no division) PLL operation, no division)
Flash Memory 22mA (f(BCLK) = 24MHz, 20mA (f(BCLK) = 20MHz,
PLL operation, no division) PLL operation, no division)
Mask ROM 3µA (f(BCLK) = 32kHz, Wait mode, Oscillation capacity Low)
Flash Memory 0.8µA (Stop mode, Topr = 25°C)
Flash Memory Program/Erase Supply Voltage 3.0 ± 0.3V or 5.0 ± 0.5V
Version
Program and Erase Endurance 100 times
5.0 ± 0.5V
I/O
I/O Withstand Voltage 5.0V
Characteristics Output Current
Operating Ambient Temperature
5mA
-40 to 85°C
T version: -40 to 85°C
V version: -40 to 125°C (option)
Device Configuration
Package
CMOS high performance silicon gate
100-pin plastic mold QFP, LQFP
NOTES:
1. I2C-bus is a registered trademark of Koninklijke Philips Electronics N.V.
2. IEBus is a registered trademark of NEC Electronics Corporation.
option: All options are on request basis.
Rev.2.30 Oct 24, 2005 page 2 of 376
REJ09B0009-0230