M16C6N4 Datasheet, PDF (395/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/6N Group (M16C/6N4) Hardware Manual
Rev. Date
1.00 May. 30, 2003
2.00 Nov. 10, 2004
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Description
Summary
First edition issued
Revised edition issued
* Words standardizes (on-chip oscillator)
* 100P6Q-A (100-pin version) is added.
* Usage Notes Reference Book is added to Chapter 23 Usage Precaution.
* Revised parts and revised contents are as follows (except for change of chapter composition,
change of a layout, and an expressional change).
1. Overview 3rd line: "and LQFP" is added.
Table 1.1 Performance outline of M16C/6N Group (M16C/6N4)
• Operation Mode is added.
• Address Space is added.
• Power Consumption is revised.
• "LQFP" is added to Package.
Table 1.2 Product List is revised.
Figure 1.2 Type No., Memory Size, and Package:
• "GP: Package 100P6Q-A" is added to Package type.
Figure 1.3 Pin Configuration (Top View) (1): "ZP" is added.
Figure 1.4 Pin Configuration (Top View) (2) is added. (100P6Q-A)
Table 1.4 Pin Description (2): "ZP" is added to Timer A.
3. Memory
• 5th to 6th lines: The description about the flash memory version (block A) is added.
Figure 3.1 Memory Map:
• Internal ROM (data area) is added.
• NOTES 3, 4 are added and NOTE 5 is revised.
Table 4.1 SFR Information (1)
• The value of After Reset in PM1 register is revised.
• The value of After Reset in CM2 register is revised.
Table 4.7 SFR Information (7)
• The value of After Reset in FMR0 register is revised.
Table 4.15 SFR Information (15)
• The value of After Reset in U0C1 register is revised.
• The value of After Reset in U1C1 register is revised.
• NOTE 1 is added.
Table 4.16 SFR Information (16)
• The value of After Reset in DA0, DA1 registers are revised.
Figure 5.1 Example Reset Circuit: NOTE 1 is added.
Figure 6.2 PM1 Register
• The value of After Reset is revised.
• NOTES 2, 6 are revised.
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Figure 6.6 Memory Map and CS Area in Memory Expansion Mode and Microprocessor Mode (3)
• NOTE 2 is added.
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Figure 6.7 Memory Map and CS Area in Memory Expansion Mode and Microprocessor Mode (4)
• NOTE 1 is added.
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