M16C6N4 Datasheet, PDF (296/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6N4)
21. Flash Memory Version
21.5 Parallel I/O Mode
In parallel I/O mode, the user ROM area and the boot ROM area can be rewritten by a parallel programmer
supporting the M16C/6N Group (M16C/6N4). Contact your parallel programmer manufacturer for more
information on the parallel programmer. Refer to the user's manual included with your parallel programmer
for instructions.
21.5.1 User ROM and Boot ROM Areas
An erase block operation in the boot ROM area is applied to only one 4-Kbyte block. The rewrite control
program in standard serial I/O and CAN I/O modes are written in the boot ROM area before shipment. Do
not rewrite the boot ROM area if using the serial programmer.
In parallel I/O mode, the boot ROM area is located in addresses 0FF000h to 0FFFFFh. Rewrite this
address range only if rewriting the boot ROM area. (Do not access addresses other than addresses
0FF000h to 0FFFFFh.)
21.5.2 ROM Code Protect Function
The ROM code protect function prevents the flash memory from being read and rewritten in parallel I/O
mode. (Refer to 21.2 Functions to Prevent Flash Memory from Rewriting.)
Rev.2.30 Oct 24, 2005 page 278 of 376
REJ09B0009-0230