M16C6N4 Datasheet, PDF (398/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/6N Group (M16C/6N4) Hardware Manual
Rev. Date
Page
Description
Summary
2.00 Nov. 10, 2004 134 Figure 14.6 (upper) ICTB2 Register
• (b7-b4) is revised.
• NOTE 3 is added.
135 Figure 14.7 (upper) TRGSR Register: NOTE 2 is added.
136 Figure 14.8 (upper) TA1MR, TA2MR and TA4MR Registers
• Function of MR1 bit: "Has no effect" is revised to "Set to "0" ".
137 Figure 14.9 Triangular Wave Modulation Operation is revised.
139 15.1 UARTi: "UART0, UART1" in Special mode 3 is deleted.
140, 141 Figures 15.1 to 15.3 UART0 to 2 Block Diagram are revised.
142 Figure 15.4 UARTi Transmit/Receive Unit is revised.
144 Figure 15.6 (lower) U0C0 to U2C0 Registers: NOTES 3, 4 are revised.
145 Figure 15.7 (upper) U0C1, U1C1 Registers
• The value of After Reset is revised.
• (b5-b4) is revised from "When read, their contents are "0" " to "When read, their
contents are indeterminate".
• NOTE 1 is added.
Figure 15.7 (lower) U2C1 Register: NOTE 1 is added.
153 15.1.1.1 Counter Measure for Communication Error Occurs is added.
154 15.1.1.4 Continuous Receive Mode: first to 4th lines are added.
_______ _______
156 15.1.1.7 CTS/RTS Function is added.
157 Table 15.5 UART Mode Specifications: NOTE 3 is added.
159 Table 15.7 I/O Pin Functions
• Method of Selection in TXDi: "Output dummy data" is revised to "Output "H" ".
161 15.1.2.1 Bit Rates and Table 15.9 Example of Bit Rates and Settings are added.
162 15.1.2.2 Counter Measure for Communication Error Occurs is added.
_______ _______
164 15.1.2.6 CTS/RTS Function is added.
176 Table 15.15 Registers to Be Used and Settings in Special Mode 2
• "U2LCH" in UiC1 register is revised to "UiLCH".
179 Table 15.16 Registers to Be Used and Settings in IE Mode
• "UiRRM" in UiC1 register is revised to "U2RRM".
181 Table 15.17 SIM Mode Specifications: NOTE 3 is added.
189 Figure 15.39 Polarity of Transfer Clock is revised.
205 16.2.4 External Operation Amplifier (Op-Amp) Connection Mode: 6th line
• "Note that the ANEX0 and ANEX1 pins cannot be directly connected to each other."
is deleted.
206 16.2.6 Output Impedance of Sensor under A/D Conversion is added.
209 Figure 17.2 (lower) DA0 and DA1 Registers: The value of After Reset are revised.
216 Figure 19.4 Bit Mapping of Mask Registers in Byte Access: NOTES 1, 2 are added.
Figure 19.5 Bit Mapping of Mask Registers in Word Access: NOTES 1, 2 are added.
217 Figure 19.6 C0MCTLj and C1MCTLj Registers: NOTE 2 is revised.
218 Figure 19.7 C0CTLR and C1CTLR Registers (upper)
• NOTE 1 (Rev.1.00) is deleted and NOTES 1, 2, 3 are added.
Figure 19.7 C0CTLR and C1CTLR Registers (lower): NOTES 3, 4 are added.
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