M16C6N4 Datasheet, PDF (384/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

Under development
This document is under development and its contents are subject to change.
M16C/6N Group (M16C/6N4)
23. Usage Precaution
23.11 Programmable I/O Ports
_______
If a low-level signal is applied to the NMI pin when the IVPCR1 bit in the TB2SC register = 1 (three-phase
_______
output forcible cutoff by input on NMI pin enabled), the P7_2 to P7_5, P8_0 and P8_1 pins go to a high-
impedance state.
Setting the SM32 bit in the S3C register to “1” causes the P9_2 pin to go to a high-impedance state.
The input threshold voltage of pins differs between programmable I/O ports and peripheral functions.
Therefore, if any pin is shared by a programmable I/O port and a peripheral function and the input level at
this pin is outside the range of recommended operating conditions VIH and VIL (neither “high” nor “low”),
the input level may be determined differently depending on which side—the programmable I/O port or the
peripheral function—is currently selected.
Indeterminate values are read from the P3_7 to P3_4, PD3_7 to PD3_4 bits by reading the P3 and PD3
registers when the PM01 to PM00 bits in the PM0 register are set to “01b” (memory expansion mode) or
“11b” (microprocessor mode) and setting the PM11 bit to “1”.
Use the MOV instruction when rewriting the P3 and PD3 registers (including the case that the size specifier
is “.W” and the P2 and PD2 registers are rewritten).
When the PM01 to PM00 bits are rewritten, “L” is output from the P3_7 to P3_4 pins during 0.5 cycles of the
BCLK by setting the PM01 to PM00 bits in the PM0 register to “01b” (memory expansion mode) or “11b”
(microprocessor mode) from “00b” (single-chip mode) after setting the PM11 bit to “1”.
Rev.2.30 Oct 24, 2005 page 366 of 376
REJ09B0009-0230