M16C6N4 Datasheet, PDF (271/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6N4)
21. Flash Memory Version
21.2 Functions to Prevent Flash Memory from Rewriting
The flash memory has a built-in ROM code protect function for parallel I/O mode and a built-in ID code
check function for standard serial I/O mode and CAN I/O mode to prevent the flash memory from reading or
rewriting.
21.2.1 ROM Code Protect Function
The ROM code protect function inhibits the flash memory from being read or rewritten during parallel I/O
mode. Figure 21.2 shows the ROMCP register. The ROMCP register is located in the user ROM area.
The ROM code protect function is enabled when the ROMCR bits are set to other than “11b ”. In this case,
set the bit 5 to bit 0 to “111111b ”.
When exiting ROM code protect, erase the block including the ROMCP register by the CPU rewrite mode
or the standard serial I/O mode or CAN I/O mode.
21.2.2 ID Code Check Function
Use the ID code check function in standard serial I/O mode and CAN I/O mode. The ID code sent from the
serial programmer is compared with the ID code written in the flash memory for a match. If the ID codes
do not match, commands sent from the serial programmer are not accepted. However, if the four bytes of
the reset vector are “FFFFFFFFh”, ID codes are not compared, allowing all commands to be accepted.
The ID codes are 7-byte data stored consecutively, starting with the first byte, into addresses 0FFFDFh,
0FFFE3h, 0FFFEBh, 0FFFEFh, 0FFFF3h, 0FFFF7h, and 0FFFFBh. The flash memory must have a
program with the ID codes set in these addresses.
Figure 21.3 shows the ID code store addresses.
Rev.2.30 Oct 24, 2005 page 253 of 376
REJ09B0009-0230