M16C6N4 Datasheet, PDF (67/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6N4)
7. Bus
(1) Separate bus, No wait setting
Bus cycle ⁽¹⁾
Bus cycle ⁽¹⁾
BCLK
Write signal
Read signal
Data bus
Address bus
CS
Output
Address
Input
Address
(2) Separate bus, 1-wait setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
Bus cycle ⁽¹⁾
Output
Address
Bus cycle ⁽¹⁾
Input
Address
(3) Separate bus, 2-wait setting
BCLK
Write signal
Read signal
Data bus
Address bus
CS
Bus cycle ⁽¹⁾
Output
Address
Bus cycle ⁽¹⁾
Input
Address
NOTE:
1. These example timing charts indicate bus cycle length. After this bus cycle sometimes come read and
write cycles in succession.
Figure 7.7 Typical Bus Timings Using Software Wait (1)
Rev.2.30 Oct 24, 2005 page 49 of 376
REJ09B0009-0230