M16C6N4 Datasheet, PDF (401/406 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

REVISION HISTORY
M16C/6N Group (M16C/6N4) Hardware Manual
Rev. Date
2.00 Nov. 10, 2004
Page
319
322
323
327
328
330
331
332
2.10 Jun. 24, 2005 –
2
4
19
53
68
217
218
219
222
233
Description
Summary
23.9 A/D Converter: last item is added. (When setting the ADST bit to •••)
23.10.2 Performing CAN Configuration is added.
23.10.3 Suggestions to Reduce Power Consumption is added.
23.13 Mask ROM Version is added.
23.14.4 Low Power Dissipation Mode and On-Chip Oscillator Low Power Dissipation
Mode is revised.
23.15 Flash Memory Programming Using Boot Program is added.
23.16 Noise is added.
Appendix 1. Package Dimensions: 100P6Q-A is added.
Revised edition issued
* The contents of product are revised. (Normal-ver. is added.)
* Revised parts and revised contents are as follows (except for expressional change).
Table 1.1 Performance outline of M16C/6N Group (M16C/6N4)
• Performance outline of Normal-ver. is added.
Table 1.2 Product List is revised. (Normal-ver. is added.)
Figure 1.2 Type No., Memory Size, and Package:
• "(no): Normal-ver." is added to Characteristics.
Figure 4.7 SFR Information (7): NOTE 1 is revised.
Figure 8.4 CM2 Register: The value of After Reset is revised.
Figure 8.13 State Transition in Normal Operation Mode: NOTE 7 is revised.
Figure 19.6 C0MCTLj and C1MCTLj Registers
• RemActive bit: Function is revised.
• RspLock bit: Bit Name is revised.
• NOTE 2 is revised.
Figure 19.7 C0CTLR and C1CTLR Registers (upper)
• LoopBack bit: The expression of Function is revised.
• BasicCAN bit: The expression of Function is revised.
Figure 19.7 C0CTLR and C1CTLR Registers (lower)
• TSPreScale bit: Bit Symbol is revised. (“Bit1, Bit0” is deleted.)
• TSReset bit: The expression of Function is revised.
• RetBusOff bit: The expression of Function is revised.
• RXOnly bit: The expression of Function is revised.
Figure 19.8 C0STR and C1STR Registers (upper): NOTE 1 is deleted.
Figure 19.8 C0STR and C1STR Registers (lower)
• State_LoopBack bit: The expression of Function is revised.
• State_BasicCAN bit: The expression of Function is revised.
Figure 19.11 C0RECR, C1RECR Registers, C0TECR, C1TECR Registers, C0TSR,
C1TSR Registers, and C0AFS, C1AFS Registers
• C0RECR, C1RECR Registers: NOTE 2 is deleted.
• C0TECR, C1TECR Registers: NOTE 1 is deleted.
• C0TSR, C1TSR Registers: NOTE 1 is deleted.
19.15.1 Reception (1): “(refer to 19.15.2 Transmission)” is deleted.
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