HD64F3664FPV Datasheet, PDF (369/446 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Table 20.12 I²C Bus Interface Timing
Values
Item
Symbol Min
Typ
Max
SCL input cycle time t_SCL
12t_cyc + 600 —
—
SCL input high width t_SCLH
3t_cyc + 300 —
—
SCL input low width t
5t + 300 —
—
SCLL
cyc
Input fall time of
t_Sf
—
SCL and SDA
—
300
SCL and SDA input t_SP
—
spike pulse removal
time
—
1t_cyc
SDA input bus-free t
5t
BUF
cyc
time
—
—
Start condition input t_STAH
3t_cyc
hold time
—
—
Retransmission start t_STAS
3t_cyc
condition input setup
time
—
—
Setup time for stop t
3t
STOS
cyc
condition input
—
—
Data-input setup time t
1t +20 —
—
SDAS
cyc
Data-input hold time t_SDAH
0
—
—
Capacitive load of
c_b
0
SCL and SDA
—
400
SCL and SDA output t_Sf
—
fall time
—
250
—
—
300
Section 20 Electrical Characteristics
Test
Reference
Unit Condition Figure
ns
Figure 20.4
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
ns
V_CC = 4.0 V
to 5.5 V
ns
Rev. 6.00 Mar. 24, 2006 Page 339 of 412
REJ09B0142-0600