HD64F3664FPV Datasheet, PDF (24/446 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Figure 12.26 When Compare Match and Bit Manipulation Instruction to TCRW
Occur at the Same Timing .................................................................................... 189
Section 13 Watchdog Timer
Figure 13.1 Block Diagram of Watchdog Timer ........................................................................ 191
Figure 13.2 Watchdog Timer Operation Example...................................................................... 195
Section 14 Serial Communication Interface 3 (SCI3)
Figure 14.1 Block Diagram of SCI3........................................................................................... 198
Figure 14.2 Data Format in Asynchronous Communication ...................................................... 210
Figure 14.3 Relationship between Output Clock and Transfer Data Phase
(Asynchronous Mode) (Example with 8-Bit Data, Parity, Two Stop Bits) ............ 210
Figure 14.4 Sample SCI3 Initialization Flowchart ..................................................................... 211
Figure 14.5 Example SCI3 Operation in Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit).......................................................................... 212
Figure 14.6 Sample Serial Transmission Flowchart (Asynchronous Mode) .............................. 213
Figure 14.7 Example SCI3 Operation in Reception in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit).......................................................................... 214
Figure 14.8 Sample Serial Data Reception Flowchart (Asynchronous mode) (1)...................... 216
Figure 14.8 Sample Serial Reception Data Flowchart (2) .......................................................... 217
Figure 14.9 Data Format in Clocked Synchronous Communication .......................................... 218
Figure 14.10 Example of SCI3 Operation in Transmission in Clocked Synchronous Mode...... 219
Figure 14.11 Sample Serial Transmission Flowchart (Clocked Synchronous Mode) ................ 220
Figure 14.12 Example of SCI3 Reception Operation in Clocked Synchronous Mode............... 221
Figure 14.13 Sample Serial Reception Flowchart (Clocked Synchronous Mode)...................... 222
Figure 14.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clocked Synchronous Mode) .............................................................................. 223
Figure 14.15 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A).......................................... 225
Figure 14.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 226
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 227
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 228
Figure 14.18 Example of SCI3 Operation in Reception Using Multiprocessor Format
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) ............................. 229
Figure 14.19 Receive Data Sampling Timing in Asynchronous Mode ...................................... 232
Section 15 I²C Bus Interface (IIC)
Figure 15.1 Block Diagram of I²C Bus Interface ....................................................................... 234
Figure 15.2 I²C Bus Interface Connections (Example: This LSI as Master) .............................. 235
Figure 15.3 I²C Bus Data Formats (I²C Bus Formats)................................................................ 250
Figure 15.4 I²C Bus Timing........................................................................................................ 250
Figure 15.5 Master Transmit Mode Operation Timing Example (MLS = WAIT = 0).............. 252
Rev. 6.00 Mar. 24, 2006 Page xxii of xxviii