HD64F3664FPV Datasheet, PDF (273/446 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 15 I²C Bus Interface (IIC)
Initial
Bit
Bit Name Value R/W Description
3
ACKE
0
R/W Acknowledge Bit Judgement Selection
0: The value of the acknowledge bit is ignored, and
continuous transfer is performed. The value of the
received acknowledge bit is not indicated by the
ACKB bit, which is always 0.
1: If the acknowledge bit is 1, continuous transfer is
interrupted.
2
BBSY
0
R/W Bus Busy
In slave mode, reading the BBSY flag enables to
confirm whether the I²C bus is occupied or released.
The BBSY flag is set to 0 when the SDA level changes
from high to low under the condition of SCl = high,
assuming that the start condition has been issued. The
BBSY flag is cleared to 0 when the SDA level changes
from low to high under the condition of SCl = high,
assuming that the start condition has been issued.
Writing to the BBSY flag in slave mode is disabled.
In master mode, the BBSY flag is used to issue start
and stop conditions. Write 1 to BBSY and 0 to SCP to
issue a start condition. Follow this procedure when also
re-transmitting a start condition. To issue a start/stop
condition, use the MOV instruction. The I²C bus
interface must be set in master transmit mode before
the issue of a start condition.
Rev. 6.00 Mar. 24, 2006 Page 243 of 412
REJ09B0142-0600