HD64F3664FPV Datasheet, PDF (172/446 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 10 Timer A
Bit
Initial
Bit
Name Value R/W
2
TMA2 0
R/W
1
TMA1 0
R/W
0
TMA0 0
R/W
[Legend]
X: Don't care.
Description
Internal Clock Select 2 to 0
These bits select the clock input to TCA when TMA3 =
0.
000: φ/8192
001: φ/4096
010: φ/2048
011: φ/512
100: φ/256
101: φ/128
110: φ/32
111: φ/8
These bits select the overflow period when TMA3 = 1
(when a 32.768 kHz crystal oscillator with is used as
φW).
000: 1s
001: 0.5 s
010: 0.25 s
011: 0.03125 s
1XX: Both PSW and TCA are reset
10.3.2 Timer Counter A (TCA)
TCA is an 8-bit readable up-counter, which is incremented by internal clock input. The clock
source for input to this counter is selected by bits TMA3 to TMA0 in TMA. TCA values can be
read by the CPU in active mode, but cannot be read in subactive mode. When TCA overflows, the
IRRTA bit in interrupt request register 1 (IRR1) is set to 1. TCA is cleared by setting bits TMA3
and TMA2 in TMA to B’11. TCA is initialized to H'00.
Rev. 6.00 Mar. 24, 2006 Page 142 of 412
REJ09B0142-0600