PIC18F87K90 Datasheet, PDF (96/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
TABLE 6-2: PIC18F87K90 FAMILY REGISTER FILE SUMMARY (CONTINUED)
Address File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
F24h
F25h
F27h
F28h
F29H
F2Ah
F2Bh
F2Ch
F2Dh
F2Eh
F2Fh
F30h
F31h
F32h
F33h
F34h
F35h
F36h
F37h
F38h
F39H
F3Ah
F3Bh
F3Ch
F3Dh
F3Eh
F3Fh
F40h
F41h
F42h
F43h
F44h
F45h
F46h
F47h
F48h
F49h
F4Ah
F4Bh
F4Ch
F4Dh
F4Eh
F4Fh
Note
ANCON1
ANSEL15 ANSEL14 ANSEL13 ANSEL12 ANSEL11 ANSEL10 ANSEL9
ANCON0
ANSEL7 ANSEL6 ANSEL5 ANSEL4 ANSEL3 ANSEL2 ANSEL1
—
—
—
—
—
—
—
—
ODCON3
U2OD
U1OD
—
—
—
—
—
ODCON2
CCP10OD CCP9OD CCP8OD CCP7OD CCP6OD CCP5OD CCP4OD
ODCON1
SSP1OD CCP2OD CCP1OD
—
—
—
—
REFOCON
ROON
—
ROSSLP ROSEL
RODIV3
RODIV2 RODIV1
CCPTMRS2
—
—
—
C10TSEL0
—
C9TSEL0 C8TSEL1
CCPTMRS1
C7TSEL1 C7TSEL0
—
C6TSEL0
—
C5TSEL0 C4TSEL1
CCPTMRS0
C3TSEL1 C3TSEL0 C2TSEL2 C2TSEL1 C2TSEL0 C1TSEL2 C1TSEL1
CM3CON
CON
COE
CPOL
EVPOL1 EVPOL0
CREF
CCH1
CM2CON
CON
COE
CPOL
EVPOL1 EVPOL0
CREF
CCH1
T12CON
—
T12OUTPS3 T12OUTPS2 T12OUTPS1 T12OUTPS0 TMR12ON T12CKPS1
PR12
Timer12 Period Register
TMR12
TMR12 Register
T10CON
—
T10OUTPS3 T10OUTPS2 T10OUTPS1 T10OUTPS0 TMR10ON T10CKPS1
PR10
Timer10 Period Register
TMR10
TMR10 Register
T8CON
—
T8OUTPS3 T8OUTPS2 T8OUTPS1 T8OUTPS0 TMR8ON T8CKPS1
PR8
Timer8 Period Register
TMR8
Timer8 Register
T6CON
—
T6OUTPS3 T6OUTPS2 T6OUTPS1 T6OUTPS0 TMR6ON T6CKPS1
PR6
Timer6 Period Register
TMR6
T7GCON⁽³⁾
Timer6 Register
TMR7GE T7GPOL
T7GTM
T7GSPM
T7GGO/
T7DONE
T7GVAL
T7GSS1
T7CON⁽³⁾
TMR7L⁽³⁾
TMR7H⁽³⁾
CCP10CON⁽³⁾
CCPR10L⁽³⁾
CCPR10H⁽³⁾
CCP9CON⁽³⁾
CCPR9L⁽³⁾
CCPR9H⁽³⁾
TMR7CS1 TMR7CS0 T7CKPS1 T7CKPS0
Timer7 Register Low Byte
Timer7 Register High Byte
—
—
DC10B1 DC10B0
Capture/Compare/PWM Register 10 Low Byte
Capture/Compare/PWM Register 10 High Byte
—
—
DC9B1
DC9B0
Capture/Compare/PWM Register 9 Low Byte
Capture/Compare/PWM Register 9 High Byte
—
CCP10M3
CCP9M3
T7SYNC
CCP10M2
CCP9M2
RD16
CCP10M1
CCP9M1
CCP8CON
—
—
DC8B1
DC8B0 CCP8M3 CCP8M2 CCP8M1
CCPR8L
Capture/Compare/PWM Register 8 Low Byte
CCPR8H
Capture/Compare/PWM Register 8 High Byte
CCP3CON
P3M1
P3M0
DC3B1
DC3B0 CCP3M3 CCP3M2 CCP3M1
CCPR3L
Capture/Compare/PWM Register 3 Low Byte
CCPR3H
Capture/Compare/PWM Register 3 High Byte
ECCP3DEL
P3RSEN P3DC6
P3DC5
P3DC4
P3DC3
P3DC2
P3DC1
ECCP3AS
ECCP3ASE ECCP3AS2 ECCP3AS1 ECCP3AS0 PSS3AC1 PSS3AC0 PSS3BD1
CCP2CON
P2M1
P2M0
DC2B1
DC2B0 CCP2M3 CCP2M2 CCP2M1
CCPR2L
Capture/Compare/PWM Register 2 Low Byte
1: Bit is available when Master Clear is disabled (MCLRE = 0). When MCLRE is set, bit is unimplemented.
2: Unimplemented on 64-pin devices (PIC18F6XK90).
3: Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K90).
ANSEL8
ANSEL0
—
CTMUDS
CCP3OD
SSP2OD
RODIV0
C8TSEL0
C4TSEL0
C1TSEL0
CCH0
CCH0
T12CKPS0
T10CKPS0
T8CKPS0
T6CKPS0
T7GSS0
TMR7ON
CCP10M0
CCP9M0
CCP8M0
CCP3M0
P3DC0
PSS3BD0
CCP2M0
1111 1111
1111 1111
—
00-- ---0
0000 0000
000- ---0
0-00 0000
---0 -000
00-0 -000
0000 0000
0001 1111
0001 1111
-000 0000
1111 1111
0000 0000
-000 0000
1111 1111
0000 0000
-000 0000
1111 1111
0000 0000
-000 0000
1111 1111
0000 0000
0000 0x00
0000 0x00
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
xxxx xxxx
DS39957B-page 96
Preliminary
 2010 Microchip Technology Inc.