PIC18F87K90 Datasheet, PDF (140/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
REGISTER 10-12: PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
R/W-0
TMR5GIE
bit 7
R/W-0
LCDIE
R-0
RC2IE
R-0
TX2IE
R/W-0
CTMUIE
R/W-0
CCP2IE
R/W-0
CCP1IE
R/W-0
RTCCIE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR5GIE: Timer5 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 6
LCDIE: LCD Interrupt Enable bit⁽¹⁾
1 = Enabled
0 = Disabled
bit 5
RC2IE: AUSART Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 4
TX2IE: AUSART Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 3
CTMUIE: CTMU Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2
CCP2IE: ECCP2 Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1
CCP1IE: ECCP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 0
RTCCIE: RTCC Interrupt Enable bit
1 = Enabled
0 = Disabled
Note 1: This bit is valid when the Type-B waveform with Non-Static mode is selected.
REGISTER 10-13: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4
R/W-0
CCP10IE⁽¹⁾
bit 7
R/W-0
CCP9IE⁽¹⁾
R/W-0
CCP8IE
R/W-0
CCP7IE
R/W-0
CCP6IE
R/W-0
CCP5IE
R/W-0
CCP4IE
R/W-0
CCP3IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
CCP10IE:CCP3IE: CCP<10:3> Interrupt Enable bits⁽¹⁾
1 = Enabled
0 = Disabled
Note 1: CCP10IE and CCP9IE are unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K90).
DS39957B-page 140
Preliminary
 2010 Microchip Technology Inc.