PIC18F87K90 Datasheet, PDF (275/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
REGISTER 20-4: LCDRL: LCD REFERENCE LADDER CONTROL REGISTER
R/W-0
LRLAP1
bit 7
R/W-0
LRLAP0
R/W-0
LRLBP1
R/W-0
LRLBP0
U-0
—⁽¹⁾
R/W-0
LRLAT2
R/W-0
LRLAT1
R/W-0
LRLAT0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
bit 3
bit 2-0
LRLAP<1:0>: LCD Reference Ladder A Time Power Control bits
During Time Interval A:
11 = Internal LCD reference ladder is powered in High-Power mode
10 = Internal LCD reference ladder is powered in Medium Power mode
01 = Internal LCD reference ladder is powered in Low-Power mode
00 = Internal LCD reference ladder is powered down and unconnected
LRLBP<1:0>: LCD Reference Ladder B Time Power Control bits
During Time Interval B:
11 = Internal LCD reference ladder is powered in High-Power mode
10 = Internal LCD reference ladder is powered in Medium Power mode
01 = Internal LCD reference ladder is powered in Low-Power mode
00 = Internal LCD reference ladder is powered down and unconnected
Unimplemented: Read as ‘0’⁽¹⁾
LRLAT<2:0>: LCD Reference Ladder A Time Interval Control bits
Sets the number of 32 clock counts when the A Time Interval Power mode is active.
For Type-A Waveforms (WFT = 0):
000 = Internal LCD reference ladder is always in B Power mode
001 = Internal LCD reference ladder is in A Power mode for 1 clock and B Power mode for 15 clocks
010 = Internal LCD reference ladder is in A Power mode for 2 clocks and B Power mode for 14 clocks
011 = Internal LCD reference ladder is in A Power mode for 3 clocks and B Power mode for 13 clocks
100 = Internal LCD reference ladder is in A Power mode for 4 clocks and B Power mode for 12 clocks
101 = Internal LCD reference ladder is in A Power mode for 5 clocks and B Power mode for 11 clocks
110 = Internal LCD reference ladder is in A Power mode for 6 clocks and B Power mode for 10 clocks
111 = Internal LCD reference ladder is in A Power mode for 7 clocks and B Power mode for 9 clocks
For Type-B Waveforms (WFT = 1):
000 = Internal LCD reference ladder is always in B Power mode
001 = Internal LCD reference ladder is in A Power mode for 1 clock and B Power mode for 31 clocks
010 = Internal LCD reference ladder is in A Power mode for 2 clocks and B Power mode for 30 clocks
011 = Internal LCD reference ladder is in A Power mode for 3 clocks and B Power mode for 29 clocks
100 = Internal LCD reference ladder is in A Power mode for 4 clocks and B Power mode for 28 clocks
101 = Internal LCD reference ladder is in A Power mode for 5 clocks and B Power mode for 27 clocks
110 = Internal LCD reference ladder is in A Power mode for 6 clocks and B Power mode for 26 clocks
111 = Internal LCD reference ladder is in A Power mode for 7 clocks and B Power mode for 25 clocks
Note 1: LCDRL<3> should be maintained as ‘0’.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 275