PIC18F87K90 Datasheet, PDF (296/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

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20.9 LCD Interrupts
The LCD timing generation provides an interrupt that
defines the LCD frame timing. This interrupt can be
used to coordinate the writing of the pixel data with the
start of a new frame, which produces a visually crisp
transition of the image.
This interrupt can also be used to synchronize external
events to the LCD. For example, the interface to an
external segment driver can be synchronized for
segment data updates to the LCD frame.
A new frame is defined as beginning at the leading
edge of the COM0 common signal. The interrupt will be
set immediately after the LCD controller completes
accessing all pixel data required for a frame. This will
occur at a fixed interval before the frame boundary
(TFINT), as shown in Figure 20-18.
The LCD controller will begin to access data for the
next frame within the interval from the interrupt to when
the controller begins accessing data after the interrupt
(TFWR). New data must be written within TFWR, as this
is when the LCD controller will begin to access the data
for the next frame.
When the LCD driver is running with Type-B waveforms
and the LMUX<1:0> bits are not equal to ‘00’, there are
some additional issues.
Since the DC voltage on the pixel takes two frames to
maintain 0V, the pixel data must not change between
subsequent frames. If the pixel data were allowed to
change, the waveform for the odd frames would not
necessarily be the complement of the waveform gener-
ated in the even frames and a DC component would be
introduced into the panel.
Because of this, using Type-B waveforms requires
synchronizing the LCD pixel updates to occur within a
subframe after the frame interrupt.
To correctly sequence writing in Type-B, the interrupt
only occurs on complete phase intervals. If the user
attempts to write when the write is disabled, the WERR
bit (LCDCON<5>) is set.
Note:
The interrupt is not generated when the
Type-A waveform is selected and when the
Type-B with no multiplex (static) is
selected.
FIGURE 20-18:
COM0
COM1
COM2
COM3
EXAMPLE WAVEFORMS AND INTERRUPT TIMING IN QUARTER DUTY
CYCLE DRIVE
LCD
Interrupt
Occurs
Controller Accesses
Next Frame Data
V₃
VV₂₁
V₀
V₃
VV₂₁
V₀
V₃
VV₂₁
V₀
V₃
VV₂₁
V₀
Frame
Boundary
2 Frames
Frame
Boundary
TFINT
TFWR
TFWR = TFRAME/2*(LMUX<1:0> + 1) + TCY/2
TFINT = (TFWR/2 – (2 TCY + 40 ns)) minimum = 1.5(TFRAME/4) – (2 TCY + 40 ns)
(TFWR/2 – (1 TCY + 40 ns)) maximum = 1.5(TFRAME/4) – (1 TCY + 40 ns)
Frame
Boundary
DS39957B-page 296
Preliminary
 2010 Microchip Technology Inc.