PIC18F87K90 Datasheet, PDF (169/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
TABLE 11-10: PORTE FUNCTIONS (CONTINUED)
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RE7/ECCP2/
RE7
0
P2A/SEG31
1
ECCP2⁽¹⁾
0
O
DIG LATE<7> data output.
I
ST PORTE<7> data input.
O
DIG ECCP2 compare/PWM output; takes priority over port data.
1
I
ST ECCP2 capture input.
P2A
0
O
— ECCP2 PWM Output A. May be configured for tri-state during
Enhanced PWM shutdown event.
SEG31
1
O
ANA Segment 31 analog output for LCD; disables digital output.
Legend:
Note 1:
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
TABLE 11-11: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
PORTE
RE7
RE6
RE5
RE4
RE3
RE2
RE1
RE0
76
LATE
LATE7 LATE6 LATE5 LATE4 LATE3
LATE2
LATE1
LATE0
76
TRISE
TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2
TRISE1 TRISE0 76
LCDCON LCDEN SLPEN WERR
—
CS1
CS0
LMUX1 LMUX0
81
LCDSE3
SE31
SE30
SE29 SE28 SE27
SE26
SE25
SE24
81
ODCON1 SSP1OD CCP2OD CCP1OD —
—
—
—
SSP2OD 79
ODCON2 CCP10OD CCP9OD CCP8OD CCP7OD CCP6OD CCP5OD CCP4OD CCP3OD 79
PADCFG1 RDPU
REPU RJPU⁽¹⁾
—
— RTSECSEL1 RTSECSEL0 —
78
Legend: Shaded cells are not used by PORTE.
Note 1: Not available on 64-pin devices.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 169