PIC18F87K90 Datasheet, PDF (83/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
6.0 MEMORY ORGANIZATION
PIC18F87K90 family devices have these types of
memory:
• Program Memory
• Data RAM
• Data EEPROM
As Harvard architecture devices, the data and program
memories use separate busses. This enables
concurrent access of the two memory spaces.
The data EEPROM, for practical purposes, can be
regarded as a peripheral device because it is
addressed and accessed through a set of control
registers.
Additional detailed information on the operation of the
Flash program memory is provided in Section 7.0
“Flash Program Memory”. The data EEPROM is
discussed separately in Section 8.0 “Data EEPROM
Memory”.
FIGURE 6-1:
MEMORY MAPS FOR PIC18F87K90 FAMILY DEVICES
CALL, CALLW, RCALL,
PC<20:0>
21
RETURN, RETFIE, RETLW,
ADDULNK, SUBULNK
Stack Level 1

Stack Level 31
PIC18FX5K90
On-Chip
Memory
PIC18FX6K90
On-Chip
Memory
PIC18FX7K90
On-Chip
Memory
000000h
007FFFh
00FFFFh
Unimplemented
Read as ‘0’
Unimplemented
Read as ‘0’
01FFFFh
Unimplemented
Read as ‘0’
Note:
1FFFFFh
Sizes of memory areas are not to scale. Sizes of program memory areas are enhanced to show detail.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 83