PIC18F87K90 Datasheet, PDF (195/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
FIGURE 13-7:
TMR1GE
T1GPOL
T1GSPM
T1GTM
T1GGO/
T1DONE
T1G_IN
TIMER1 GATE SINGLE PULSE AND TOGGLE COMBINED MODE
Set by Software
Counting Enabled on
Rising Edge of T1G
Cleared by Hardware on
Falling Edge of T1GVAL
T1CKI
T1GVAL
Timer1
RTCCIF
N
Cleared by Software
N+1 N+2 N+3
Set by Hardware on
Falling Edge of T1GVAL
N+4
Cleared by
Software
TABLE 13-5: REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE TMR0IF INT0IF
RBIF
73
PIR1
—
ADIF
RC1IF TX1IF SSP1IF TMR1GIF TMR2IF TMR1IF 75
PIE1
—
ADIE
RC1IE TX1IE SSP1IE TMR1GIE TMR2IE TMR1IE 75
IPR1
—
ADIP
RC1IP TX1IP SSP1IP TMR1GIP TMR2IP TMR1IP 75
TMR1L
Timer1 Register Low Byte
74
TMR1H
Timer1 Register High Byte
74
T1CON
TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 SOSCEN T1SYNC RD16 TMR1ON 74
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ T1GVAL T1GSS1 T1GSS0 75
T1DONE
OSCCON2
— SOSCRUN —
—
SOSCGO
—
MFIOFS MFIOSEL 77
CCPTMRS0 C3TSEL1 C3TSEL0 C2TSEL2 C2TSEL1 C2TSEL0 C1TSEL2 C1TSEL1 C1TSEL0 79
CCPTMRS1 C7TSEL1 C7TSEL0
—
C6TSEL0
—
C5TSEL0 C4TSEL1 C4TSEL0 79
CCPTMRS2 —
—
—
C10TSEL0 —
C9TSEL0 C8TSEL1 C8TSEL0 79
Legend: Shaded cells are not used by the Timer1 module.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 195