PIC18F87K90 Datasheet, PDF (255/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

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19.4 PWM (Enhanced Mode)
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the PxM bits of the
CCPxCON register must be set appropriately.
The PWM outputs are multiplexed with I/O pins and are
designated: PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Table 19-1 provides the pin assignments for each
Enhanced PWM mode.
Figure 19-3 provides an example of a simplified block
diagram of the Enhanced PWM module.
Note:
To prevent the generation of an
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
FIGURE 19-3:
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Duty Cycle Registers
CCPR1L
DC1B<1:0>
CCPR1H (Slave)
Comparator
R
TMR2
Comparator
PR2
(1)
S
Clear Timer2,
Toggle PWM Pin and
Latch Duty Cycle
PxM<1:0>
CCPxM<3:0>
2
4
ECCPx/PxA
TRIS
PxB
Q
Output
Controller
TRIS
PxC
TRIS
PxD
ECCP1DEL
TRIS
ECCP1/Output Pin
Output Pin
Output Pin
Output Pin
Note 1: The 8-bit TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create
the 10-bit time base.
Note: The TRIS register value for each PWM output must be configured appropriately.
Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 255