PIC18F87K90 Datasheet, PDF (235/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
18.0 CAPTURE/COMPARE/PWM
(CCP) MODULES
PIC18F87K90 family devices have seven CCP
(Capture/Compare/PWM) modules, designated CCP4
through CCP10. All the modules implement standard
Capture, Compare and Pulse-Width Modulation (PWM)
modes.
Note:
Throughout this section, generic references
are used for register and bit names that are
the same, except for an ‘x’ variable that indi-
cates the item’s association with the specific
CCP module. For example, the control
register is named CCPxCON and refers to
CCP4CON through CCP10CON.
Each CCP module contains a 16-bit register that can
operate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
For the sake of clarity, all CCP module operation in the
following sections is described with respect to CCP4,
but is equally applicable to CCP5 through CCP10.
Note:
The CCP9 and CCP10 modules are
disabled on the devices with 32 Kbytes of
program memory (PIC18FX5K90).
REGISTER 18-1: CCPxCON: CCPx CONTROL REGISTER (CCP4-CCP10 MODULES)⁽¹⁾
U-0
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
DCxB1
DCxB0
CCPxM3
CCPxM2
CCPxM1
CCPxM0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
bit 3-0
Unimplemented: Read as ‘0’
DCxB<1:0>: PWM Duty Cycle for CCPx Module bits (bit 1, bit 0)
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight
Most Significant bits (DCxB<9:2>) of the duty cycle are found in CCPRxL.
CCPxM<3:0>: CCPx Module Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0001 = Reserved
0010 = Compare mode: toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode: every falling edge
0101 = Capture mode: every rising edge
0110 = Capture mode: every 4th rising edge
0111 = Capture mode: every 16th rising edge
1000 = Compare mode: initialize CCPx pin low; on compare match, force CCPx pin high (CCPxIF bit
is set)
1001 = Compare mode: initialize CCPx pin high; on compare match, force CCPx pin low (CCPxIF bit
is set)
1010 = Compare mode: generate software interrupt on compare match (CCPxIF bit is set, CCPx pin
reflects I/O state)
1011 = Compare mode: Special Event Trigger; reset timer on CCPx match (CCPxIF bit is set)⁽²⁾
11xx = PWM mode
Note 1: The CCP9 and CCP10 modules are not available on devices with 32 Kbytes of program memory
(PIC18FX5K90).
2: CCPxM<3:0> = 1011 will only reset the timer and not start A/D conversion on CCPx match.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 235