PIC18F87K90 Datasheet, PDF (93/566 Pages) Microchip Technology – 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC18F87K90 FAMILY
6.3.4 SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
all of Bank 15 (F00h to FFFh) and the top part of
Bank 14 (EF4h to EFFh).
A list of these registers is given in Table 6-1 and
Table 6-2.
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and Interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this section.
Registers related to the operation of the peripheral
features are described in the chapter for that peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
TABLE 6-1: PIC18F87K90 FAMILY SPECIAL FUNCTION REGISTER MAP⁽⁵⁾
Addr.
Name
Addr.
Name
Addr.
Name
FFFh
FFEh
FFDh
FFCh
FFBh
TOSU
TOSH
TOSL
STKPTR
PCLATU
FDFh INDF2⁽¹⁾ FBFh ECCP1AS
FDEh POSTINC2⁽¹⁾ FBEh ECCP1DEL
FDDh POSTDEC2⁽¹⁾ FBDh CCPR1H
FDCh PREINC2⁽¹⁾ FBCh CCPR1L
FDBh PLUSW2⁽¹⁾ FBBh CCP1CON
FFAh PCLATH FDAh FSR2H FBAh PIR5
FF9h
PCL
FD9h FSR2L FB9h PIE5
FF8h TBLPTRU FD8h STATUS FB8h IPR4
FF7h TBLPTRH FD7h TMR0H FB7h PIR4
FF6h TBLPTRL FD6h TMR0L FB6h PIE4
FF5h TABLAT FD5h T0CON FB5h CVRCON
FF4h PRODH FD4h SPBRGH1 FB4h CMSTAT
FF3h PRODL FD3h OSCCON FB3h TMR3H
FF2h INTCON FD2h IPR5
FB2h TMR3L
FF1h INTCON2 FD1h WDTCON FB1h T3CON
FF0h INTCON3 FD0h
FEFh INDF0⁽¹⁾ FCFh
FEEh POSTINC0⁽¹⁾ FCEh
FEDh POSTDEC0⁽¹⁾ FCDh
FECh PREINC0⁽¹⁾ FCCh
FEBh PLUSW0⁽¹⁾ FCBh
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
FB0h
FAFh
FAEh
FADh
FACh
FABh
T3GCON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
FEAh FSR0H FCAh T2CON FAAh T1GCON
FE9h FSR0L FC9h SSP1BUF FA9h IPR6
FE8h WREG FC8h SSP1ADD
FE7h INDF1⁽¹⁾ FC7h SSP1STAT
FE6h POSTINC1⁽¹⁾ FC6h SSP1CON1
FE5h POSTDEC1⁽¹⁾ FC5h SSP1CON2
FE4h PREINC1⁽¹⁾ FC4h ADRESH
FE3h PLUSW1⁽¹⁾ FC3h ADRESL
FA8h HLVDCON
FA7h
—⁽²⁾
FA6h PIR6
FA5h IPR3
FA4h PIR3
FA3h PIE3
FE2h FSR1H FC2h ADCON0 FA2h IPR2
FE1h FSR1L FC1h ADCON1 FA1h PIR2
FE0h
BSR
FC0h ADCON2 FA0h PIE2
Addr. Name Addr.
Name
F9Fh IPR1 F7Fh EECON1
F9Eh PIR1 F7Eh EECON2
F9Dh PIE1 F7Dh LCDDATA23⁽³⁾
F9Ch PSTR1CON F7Ch LCDDATA22⁽³⁾
F9Bh OSCTUNE
F9Ah TRISJ⁽³⁾
F99h TRISH⁽³⁾
F7Bh
F7Ah
F79h
LCDDATA21
LCDDATA20
LCDDATA19
F98h
F97h
F96h
TRISG
TRISF
TRISE
F78h LCDDATA18
F77h LCDDATA17⁽³⁾
F76h LCDDATA16⁽³⁾
F95h TRISD F75h LCDDATA15
F94h TRISC F74h LCDDATA14
F93h TRISB F73h LCDDATA13
F92h
F91h
F90h
TRISA
LATJ⁽³⁾
LATH⁽³⁾
F72h LCDDATA12
F71h LCDDATA11⁽³⁾
F70h _LCDDATA10⁽³⁾
F8Fh _LATG F6Fh _LCDDATA9
F8Eh LATF F6Eh LCDDATA8
F8Dh LATE F6Dh LCDDATA7
F8Ch
F8Bh
F8Ah
LATD
LATC
LATB
F6Ch LCDDATA6
F6Bh LCDDATA5⁽³⁾
F6Ah LCDDATA4⁽³⁾
F89h LATA
F88h PORTJ⁽³⁾
F87h PORTH⁽³⁾
F69h
F68h
F67h
LCDDATA3
LCDDATA2
LCDDATA1
F86h
F85h
F84h
F83h
F82h
F81h
F80h
PORTG
PORTF
PORTE
PORTD
PORTC
PORTB
PORTA
F66h LCDDATA0
F65h BAUDCON1
F64h OSCCON2
F63h EEADRH
F62h EEADR
F61h EEDATA
F60h
PIE6
Addr.
Name
F5Fh RTCCFG
F5Eh RTCCAL
F5Dh RTCVALH
F5Ch RTCVALL
F5Bh ALRMCFG
F5Ah ALRMRPT
F59h ALRMVALH
F58h ALRMVALL
F57h CTMUCONH
F56h CTMUCONL
F55h CTMUICON
F54h CMCON1
F53h PADCFG1
F52h ECCP2AS
F51h ECCP2DEL
F50h CCPR2H
F4Fh CCPR2L
F4Eh CCP2CON
F4Dh ECCP3AS
F4Ch ECCP3DEL
F4Bh CCPR3H
F4Ah CCPR3L
F49h CCP3CON
F48h CCPR8H
F47h CCPR8L
F46h CCP8CON
F45h CCPR9H⁽⁴⁾
F44h CCPR9L⁽⁴⁾
F43h CCP9CON⁽⁴⁾
F42h CCPR10H⁽⁴⁾
F41h CCPR10L⁽⁴⁾
F40h CCP10CON⁽⁴⁾
Note 1:
2:
3:
4:
5:
This is not a physical register.
Unimplemented registers are read as ‘0’.
This register is not available on 64-pin devices (PIC18F6XK90).
This register is not available on devices with a program memory of 32 Kbytes (PIC18FX5K90).
Addresses, EF4h through F5Fh, are also used by SFRs, but are not part of the Access RAM. Users must always load
the proper BSR value to access these registers.
 2010 Microchip Technology Inc.
Preliminary
DS39957B-page 93