71M6545 Datasheet, PDF (90/134 Pages) Maxim Integrated Products – Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size

Data Sheet 71M6545/H
PDS_6545_009
Name
DIO_PV
DIO_PW
DIO_PX
DIO_PY
EEDATA[7:0]
EECTRL[7:0]
EQU[2:0]
EX_XFER
EX_RTC1S
EX_RTC1M
EX_RTCT
EX_SPI
EX_EEX
EX_XPULSE
EX_YPULSE
EX_WPULSE
EX_VPULSE
Location
2457[6]
2457[7]
2458[7]
2458[6]
SFR 9E
SFR 9F
2106[7:5]
2700[0]
2700[1]
2700[2]
2700[3]
2701[7]
2700[7]
2700[6]
2700[5]
2701[6]
2701[5]
Rst Wk Dir
0 – R/W
0 – R/W
0 – R/W
0 – R/W
0 0 R/W
0 0 R/W
0 0 R/W
Description
Causes VPULSE to be output on DIO1.
Causes WPULSE to be output on DIO0.
Causes XPULSE to be output on DIO6.
Causes YPULSE to be output on DIO7.
Serial EEPROM interface data.
Serial EEPROM interface control.
Status
Bit
Name
Read/
Write
Reset
State
Polarity
Description
7 ERROR R
6 BUSY
R
0 Positive 1 when an illegal command is received.
0 Positive 1 when serial data bus is busy.
5 RX_ACK R
1
Positive
1 indicates that the EEPROM sent an
ACK bit.
Specifies the power equation.
EQU[2:0]
Description
Element Element Element Recommended
0
1
2
MUX Sequence
3
2 element, 4W,
3φ el a
VA( -IB)/
0
VC IC
IA VA IB B C
VC
4
2 element, 4W,
3φ W e
A(IA-IB)/2 VB(IC-IB)/2
0
IA VA IB V I C
5*
3 element, 4W,
3φ ye
VA IA
VB B
VC C
A A IB VB
IC V
Note:
*The available CE codes implements only equation 5. Contact your local Teridian representative to
obtain CE code for equations 3 and 4.
Interrupt enable bits. These bits enable the XFER_BUSY, the RTC_1SEC, etc. The
0
0
R/W
bits are set by hardware and cannot be set by writing a 1. The bits are reset by writing
0. Note that if one of these interrupts is to enabled, its corresponding 8051 EX enable
bit must also be set. See 2.4.10 Interrupts, for details.
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