71M6545 Datasheet, PDF (130/134 Pages) Maxim Integrated Products – Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size

Data Sheet 71M6545/H
PDS_6545_009
6.8.3 71M6545/H Digital Pins
Table 100 lists the digital pins. Pin types: O = Output, I = Input, I/O = Input/Output, N/C = no connect.
The circuit number denotes the equivalent circuit, as specified in 6.8.4.
Table 100: 71M6545/H Digital Pins
Pin
No.
Name
Type Circuit
Description
31 DIO0/WPULSE
30 DIO1/VPULSE
29 DIO2/SDCK
28 DIO3/SDATA
27 DIO4
26 DIO5
25 DIO6/XPULSE
24 DIO7/YPULSE
23 DIO8/DI
Multiple-Use Pins. Configurable as DIO or its alternate
function. Alternate functions with proper selection of
associated I/O RAM registers are:
DIO0 = WPULSE (31)
DIO1 = VPULSE (30)
DIO2 = SDCK (29)
I/O
3, 4 DIO3 = SDATA (28)
DIO6 = XPULSE (25)
DIO7 = YPULSE (24)
DIO8 = DI (23)
17–22 DIO[14:9]
8–14 DIO[25:19]
Unused pins must be configured as outputs or
terminated to V3P3/GNDD.
6–7 DIO[29:28]
32 DIO55
3 SPI_CSZ
2 SPI_DO
1 SPI_DI
64 SPI_CKI
36 E_RXTX
34 E_RST
35 E_TCLK
37 ICE_E
62 TMUXOUT
63 TMUX2OUT
61 RESET
33 RX
15 TX
51 TEST
60 PB
59 NC
I
O
I
3, 4 SPI interface pins.
I
I/O
I/O
1, 4
4
Emulator port pins. These pins are activated when the
ICE_E pin is pulled high.
O
I
2
ICE enable. For production units, this pin should be
pulled to GND to disable the emulator port.
O
4 Multiplexer/clock output pins.
Chip reset: This input pin is used to reset the chip into a
known state. For normal operation, this pin is pulled low.
I
2 To reset the chip, this pin is pulled high. This pin has an
internal 30 μA (nominal) current source pull-down. No
external reset circuitry is necessary.
I
3
UART0 input. If this pin is unused it must be
terminated to V3P3D or GNDD.
O
4 UART0 output.
I
7
Enables Production Test.
This pin must be grounded in normal operation.
Push button input. This pin must be at GNDD when not
I
3 active or unused. PB does not have an internal pull-up or
pull-down resistor.
N/C
-- Do not connect this pin.
130
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