71M6545 Datasheet, PDF(17/134 Page) Maxim Integrated Products – Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size

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71M6545 Datasheet, PDF (17/134 Pages) Maxim Integrated Products – Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size

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PDS_6545_009

Data Sheet 71M6545/H

the connection details) and are also routed though the multiplexer, as seen in Figure 2. Meanwhile, the

IADC2-IADC3, IADC4-IADC5 and IADC6-IADC7 current inputs are configured as remote sensor digital

interfaces and the corresponding samples are not routed through the multiplexer. For this configuration,

the multiplexer sequence is as shown in Figure 4.

For a poly-phase configuration with optional neutral current sensing using Current Transformer (CTs)

sensors, as shown in Figure 3, all four current sensor inputs must be configured as a differential inputs,

to be connected to their corresponding CTs (see Figure 25 for the differential CT connection details). The

IADC0-IADC1 current sensor input is optionally used to sense the Neutral current for anti-tampering

purposes. The voltage sensors (VADC8, VADC9 and VADC10) are directly connected to the 71M6545/H

(see Figure 23 for the voltage sensor connection details). No 71M6xx3 isolated sensors are used in this

configuration and all sensors are routed through the multiplexer, as seen in Figure 3. For this

configuration, the multiplexer sequence is as shown in Figure 5.

The multiplexer sequence shown in Figure 4, covers the shunt configuration shown in Figure 2. The

frame duration is 13 CK32 cycles (where CK32 = 32,768 Hz), therefore, the resulting sample rate is

32,768 Hz / 13 = 2,520.6 Hz. Note that Figure 4 only shows the currents that pass through the

71M6545/H multiplexer, and does not show the currents that are copied directly into CE RAM from the

remote sensors (see Figure 2), which are sampled during the second half of the multiplexer frame. The

two unused conversion slots shown are necessary to produce the desired 2,520.6 Hz sample rate.

Multiplexer Frame

MUX_DIV[3:0] = 6 Conversions

Settle

CK32

MUX STATE S

1 Local / 3 Remotes: IN

Unused

CROSS

MUX_SYNC

Figure 4: States in a Multiplexer Frame (MUX_DIV[3:0] = 6)

The multiplexer sequence shown in Figure 5 corresponds to the CT configuration shown in Figure 3.

Since in this case all current sensors are locally connected to the 71M6545/H, all currents are routed

through the multiplexer, as seen in Figure 3. For this multiplexer sequence, the frame duration is 15 CK32

cycles (where CK32 = 32,768 Hz), therefore, the resulting sample rate is 32,768 Hz / 15 = 2,184.5 Hz.

Multiplexer Frame

MUX_DIV[3:0] = 7 Conversions

Settle

CK32

MUX STATE S

CROSS

MUX_SYNC

Figure 5: States in a Multiplexer Frame (MUX_DIV[3:0] = 7)

Multiplexer advance, FIR initiation and chopping of the ADC reference voltage (using the internal CROSS

signal, see 2.2.7 Voltage References) are controlled by the internal MUX_CTRL circuit. Additionally,

MUX_CTRL launches each pass of the CE through its code. Conceptually, MUX_CTRL is clocked by

CK32, the 32768 Hz clock from the PLL block. The behavior of the MUX_CTRL circuit is governed by:

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