71M6545 Datasheet, PDF (120/134 Pages) Maxim Integrated Products – Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size

Data Sheet 71M6545/H
PDS_6545_009
6.4.10 Phase-Locked Loop (PLL)
Table 89: PLL Performance Specifications
PARAMETER
PLL Power-up Settling Time
PLL_FAST settling time
PLL_FAST rise
PLL_FAST fall
PLL SLP to MSN Settling Time
CONDITION
MIN
PLL_FAST =0,
V3P3 = 0 to 3.3 V step
Measured from first edge of MCK
(TMUX2OUT pin)
V3P3=0
PLL_FAST =0
TYP
3
3
3
3
MAX
UNIT
ms
ms
ms
ms
120
© 2008–2011 Teridian Semiconductor Corporation
v1.0