71M6545 Datasheet, PDF (84/134 Pages) Maxim Integrated Products – Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size

Data Sheet 71M6545/H
PDS_6545_009
Table 60 lists bits and registers that may have to be accessed on a frequent basis. Reserved bits have lighter gray background, and non-volatile
bits have a darker gray background.
Table 60: I/O RAM Map – Functional Order
Name Addr
Bit 7
CE and ADC
MUX5 2100
MUX4 2101
MUX3 2102
MUX2 2103
MUX1 2104
MUX0 2105
CE6
2106
CE5
2107
CE4
2108
CE3
2109
U
CE2
210A
CE1
210B
CE0
210C DIFF6_E
RTM0 210D
U
RTM0 210E
RTM1 210F
RTM2 2110
RTM3 2111
CLOCK GENERATION
CKGN 2200
U
VREF TRIM FUSES
TRIMT 2309
DIO
DIO16 2420
U
…
…
U
DIO32 243D
U
…
…
U
DIO38 2443
U
…
…
U
DIO42 2447
U
Bit 6
Bit 5
MUX_DIV[3:0]
MUX9_SEL[3:0]
MUX7_SEL[3:0]
MUX5_SEL[3:0]
MUX3_SEL[3:0]
MUX1_SEL[3:0]
EQU[2:0]
U
U
DIFF4_E
U
DIFF2_E
U
U
ADC_DIV
U
U
U
U
U
U
U
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MUX10_SEL[3:0]
MUX8_SEL[3:0]
MUX6_SEL[3:0]
MUX4_SEL[3:0]
MUX2_SEL[3:0]
MUX0_SEL[3:0]
U
CHOP_E[1:0]
RTM_E
SUM_SAMPS[12:8]
SUM_SAMPS[7:0]
CE_LCTN[5:0]
PLS_MAXWIDTH[7:0]
PLS_INTERVAL[7:0]
DIFF0_E
RFLY_DIS
FIR_LEN[1:0]
U
U
U
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
CE_E
PLS_INV
RTM0[9:8]
PLL_FAST
RESET
MPU_DIV[2:0]
TRIMT[7:0]
DIO16[5:0]
…
DIO45[5:0]
…
DIO51[5:0]
…
DIO55[5:0]
84
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