UPI-452 Datasheet, PDF (44/53 Pages) Intel Corporation – CHMOS PROGRAMMABLE I/O PROCESSOR

UPI-452
Symbolic
Address
Table 12 Program Status Word
Physical
Address
PSW
CY
AC
FO
RS1 RS0
OV
P
0D0H
(MSB)
(LSB)
Symbol
Position
Name
CY
PSW 7
AC
PSW 6
F0
PSW 5
RS1
PSW 4
RS0
PSW 3
OV
PSW 2
PSW 1
P
PSW 0
(RS1 RS0) enable internal RAM register banks as follows
Carry Flag
Auxiliary Carry (For BCD operations)
Flag 0 (user assignable)
Register Bank Select bit 1
Register Bank Select bit 0
Overflow Flag
(reserved)
Parity Flag
RS1
RS0
Internal RAM Register Bank
0
0
Bank 0
0
1
Bank 1
1
0
Bank 2
1
1
Bank 3
Symbolic
Address
Table 13 PCON Special Function Register
Physical
Address
PCON
SMOD ARB REQ
GF1 GF0
PD
IDL
087H
(MSB)
(LSB)
Symbol
Position
Function
SMOD
PCON7
ARB
REQ
GF1
GF0
PD
IDL
See ‘‘Ext Memory DMA’’ description
PCON6
PCON5
PCON4
PCON3
PCON2
PCON1
PCON0
Double Baud rate bit When set to a
1 the baud rate is doubled when the
serial port is being used in either
Mode 1 2 or 3
HLD HLDA Arbiter control bit
HLD HLDA Requestor control bit
(reserved)
General-purpose flag bit
General-purpose flag bit
Power Down bit Setting this bit
activates power down operation
Idle Mode bit Setting this bit
activates idle mode operation
NOTE
If 1’s are written to PD and IDL at the same time PD takes precedence The reset value of PCON is (000X0000)
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