GS2971A Datasheet, PDF (82/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-16:Serial Audio Pin Descriptions (Continued)
Audio
Pin Name
AOUT_7/8
ACLK
WCLK
AMCLK
Description
Serial Audio Output; Channels 7 and 8
64fs clock
Word clock
Audio Master Clock, selectable 128fs, 256fs, or 512fs
The timing of the serial audio output signals and the ACLK output signal is as shown in
Figure 4-36: ACLK to Data Signal Output Timing.
I/O Timing Specs:
Audio Outputs:
128fs = 162.76ns (AES/EBU)
64fs = 325.52ns (other modes)
AOUT*
A0
A1
A2
A3
ACLK
toh
tod
80%
20%
tr
80%
20%
tf
AOUT
toh
1.500ns
tr/tf (min)
0.600ns
3.3V
Cload
tod tr/tf (max)
6 pF 7.000ns 2.200ns
Audio Outputs
Cload
toh
15 pF 1.500ns
tr/tf (min)
0.600ns
1.8V
Cload
tod tr/tf (max)
6 pF 7.000ns 2.300ns
Cload
15 pF
Figure 4-36:ACLK to Data Signal Output Timing
When AUDIO_EN/DIS is set HIGH, audio extraction is enabled and the audio output
signals are extracted from the video data stream. When set LOW, the serial audio
outputs, ACLK and WCLK outputs are set LOW.
In addition, all functional logic associated with audio extraction is disabled to reduce
power consumption.
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
82 of 152