GS2971A Datasheet, PDF (122/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-28:SD Audio Core Configuration and Status Registers (Continued)
Address Register Name Bit Name
42Eh
PRIM_AUD_
DELAY_11
RSVD
DEL4A_11
42Fh
PRIM_AUD_
DELAY_12
RSVD
DEL4A_12
430h
AFNB12
RSVD
AFN1_2B
431h
AFNB34
RSVD
AFN3_4B
432h
RATEB
RSVD
RATE3_4B
ASX3_4B
RATE1_2B
ASX1_2B
433h
434h
ACT_B
SEC_AUD_
DELAY_!
RSVD
ACTB
RSVD
DEL1B_1
EBIT1B
435h
SEC_AUD
DELAY_2
RSVD
DEL1B_2
436h
SEC_AUD_
DELAY_3
RSVD
DEL1B_3
437h
SEC_AUD
DELAY_4
RSVD
DEL2B_4
EBIT2B
Bit
15-9
8-0
15-9
8-0
15-9
8-0
15-9
8-0
15-8
7-5
4
3-1
0
15-4
3-0
15-9
8-1
0
15-9
8-0
15-9
8-0
15-9
8-1
0
Description
Reserved.
Primary Audio group delay data
for channel 4.
Reserved.
Primary Audio group delay data
for channel 4.
Reserved.
Secondary group audio frame
number for channels 1 and 2.
Reserved.
Secondary group audio frame
number for channels 3 and 4.
Reserved.
Secondary group sampling
frequency for channels 3 and 4.
Secondary group asynchronous
mode for channels 3 and 4.
Secondary group sampling
frequency for channels 1 and 2.
Secondary group asynchronous
mode for channels 1 and 2.
Reserved.
Secondary group active channels.
Reserved.
Secondary Audio group delay data
for channel 1.
Secondary Audio group delay data
valid flag for channel 1.
Reserved.
Secondary Audio group delay data
for channel 1.
Reserved.
Secondary Audio group delay data
for channel 1.
Reserved.
Secondary Audio group delay data
for channel 2.
Secondary Audio group delay data
valid flag for channel 2.
R/W
R/W
R
R/W
R
R/W
R
R/W
R
R
R
R
R
R
R/W
R
R/W
R
R
R/W
R
R/W
R
R/W
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
122 of 152