GS2971A Datasheet, PDF (27/152 Pages) Gennum Corporation – Integrated audio clock generator

IO_VDD
200Ω
Output Pin
Figure 3-3:Bidirectional Digital Input/Output Pin with programmable drive
strength. These pins are configured to output unless in Reset Mode; in which
case they are high-impedance. The drive strength can be set by writing to
address 06Dh in the host interface register. (DOUT0, DOUT1, DOUT2, DOUT3,
DOUT4, DOUT5, DOUT6, DOUT7, DOUT8, DOUT9, SDOUT_TDO, STAT0, STAT1,
STAT2, STAT3, STAT4, STAT5, XTAL_OUT, DOUT10, DOUT11, DOUT12,
DOUT13, DOUT14, DOUT15, DOUT16, DOUT17, DOUT18, DOUT19, PCLK)
XTAL1
XTAL2
XTAL_OUT
Figure 3-4:XTAL1/XTAL2/XTAL-OUT
A_VDD
2kΩ
50Ω
VBG
Figure 3-5:VBG
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
27 of 152