GS2971A Datasheet, PDF (130/152 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-29:HD and 3G Audio Core Configuration and Status Registers (Continued)
Address
202h
Register Name Bit Name
AUD_DET1
RSVD
IDB_READBACK
IDA_READBACK
ADPG4_DET
ADPG3_DET
ADPG2_DET
ADPG1_DET
ACS_APPLY_WAIT
203h
204h
AUD_DET2
REGEN
RSVD
ECCA_ERROR
ECCB_ERROR
RSVD
ACS_APPLY
ACS_REGEN
205h
CH_MUTE
RSVD
MUTEB
MUTEA
Bit
15-9
8-7
6-5
4
3
2
1
0
15-2
1
0
15-2
1
0
15
7-4
3-0
Description
Reserved.
Actual value of IDB in the
hardware.
Actual value of IDA in the
hardware.
Set while Group 4 audio data
packets are detected.
Set while Group 3 audio data
packets are detected.
Set while Group 2 audio data
packets are detected.
Set while Group 1 audio data
packets are detected.
ACS_APPLY_WAIT: Set while output
channels 1 and 2 are waiting for a
status boundary to apply the
ACSR[183:0] data.
Reserved.
Primary group audio data packet
error detected.
Secondary group audio data packet
error detected.
Reserved.
Cause channel status data in
ACSR[183:0] to be transferred to
the channel status replacement
mechanism. The transfer does not
occur until the next status
boundary.
Specifies that Audio Channel Status
of all channels should be replaced
with ACSR[183:0] field.
0: Do not replace Channel Status
1: Replace Channel Status of all
channels
Reserved.
Mute Secondary output channels
4..1 Where bits 7:4 = channel 4:1
1: Mute
0: Normal
Mute Primary output channels 4..1
Where bits 3:0 = channel 4:1
1: Mute
0: Normal
R/W
R
R
R
R
R
R
R
R
R/W
ROCW
ROCW
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
130 of 152