GS2971A Datasheet, PDF (128/152 Pages) Gennum Corporation – Integrated audio clock generator

4.21.3 HD and 3G Audio Core Registers
NOTE: The GS2971A only accepts write/read commands to/from the HD/3G Audio
Register Map when the audio core is locked to the incoming HD or 3G video format.
Table 4-29:HD and 3G Audio Core Configuration and Status Registers
Address Register Name Bit Name
200h
CFG_AUD
ECC_OFF
ALL_DEL
MUTE_ALL
ACS_USE_SECOND
ASWLB
ASWLA
AMB
AMA
Bit Description
15
14
13
12
11-10
9-8
7-6
5-4
Disables ECC error correction.
Selects deletion of all audio data
and all audio control packets
0: Do not delete existing audio
control packets
1: Delete existing audio control
packets.
Mute all output channels
0: Normal
1: Muted
Extract Audio Channel Status from
second channel pair.
Secondary group output word
length.
00: 24 bits
01: 20 bits
10: 16 bits
11: invalid
Primary group output word length.
00: 24 bits
01: 20 bits
10: 16 bits
11: invalid
Secondary group output format
selector.
00: AES/EBU audio output
01: Serial audio output: left
justified MSB first
10: Serial audio output: right
justified. MSB first
11: I2S serial audio output
Primary group output format
selector.
00: AES/EBU audio output
01: Serial audio output: left
justified MSB first
10: Serial audio output: right
justified MSB first
11: I2S serial audio output
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
3
3
3
3
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
128 of 152