GS2971A Datasheet, PDF (68/152 Pages) Gennum Corporation – Integrated audio clock generator

Line based CRC errors are only generated when the device is operating in HD and 3G
modes.
NOTE: By default, 8-bit to 10-bit TRS remapping is enabled. If an 8-bit input is used, the
HD CRC check is based on the 10-bit remapped value, not the 8-bit value, so the CRC
Error Flag is incorrectly asserted and should be ignored. If 8-bit to 10-bit remapping is
enabled, then CRC correction and insertion should be enabled by setting the
CRC_INS_MASK bit in the IOPROC_DISABLE register LOW. This ensures that the CRC
values are updated.
4.16.3 EDH CRC Error Detection
The GS2971A also calculates Full Field (FF) and Active Picture (AP) CRC's according to
SMPTE RP165 in support of Error Detection and Handling packets in SD signals.
These calculated CRC values are compared with the received CRC values.
Error flags for AP and FF CRC errors are provided and each error flag is a logical OR of
field 1 and field 2 error conditions.
The AP_CRC_ERR bit in the VIDEO_ERROR_STAT_X register is set HIGH when an Active
Picture CRC mismatch has been detected in field 1 or 2.
The FF_CRC_ERR bit in the VIDEO_ERROR_STAT_X register is set HIGH when a Full
Field CRC mismatch has been detected in field 1 or 2.
EDH CRC errors are only indicated when the device is operating in SD mode and when
the device has correctly received EDH packets.
4.16.4 HD & 3G Line Number Error Detection
If a mismatch in the calculated and received line numbers is detected, the LNUM_ERR
bit in the VIDEO_ERROR_STAT_X register is set HIGH.
4.17 Ancillary Data Detection & Indication
The GS2971A detects ancillary data in both the vertical and horizontal ancillary data
spaces. Status signal outputs Y/1ANC and C/2ANC are provided to indicate the position
of ancillary data in the output data streams. These signals may be selected for output on
the multi-function I/O port pins (STAT[5:0]).
The GS2971A indicates the presence of all types of ancillary data by detecting the 000h,
3FFh, 3FFh (00h, FFh, FFh for 8-bit video) ancillary data preamble.
NOTE 1: Both 8 and 10-bit ancillary data preambles are detected by the device.
By default (at power up or after system reset) the GS2971A indicates all types of
ancillary data. Up to 5 types of ancillary data can be specifically programmed for
recognition.
For HD video signals, ancillary data may be placed in both the Y and Cb/Cr video data
streams separately. For SD video signals, the ancillary data is multiplexed and combined
into the YCbCr data space.
For 3G signals, ancillary data may be placed in either or both of the virtual interface data
streams. Both data streams are examined for ancillary data.
GS2971A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54311 - 2
September 2012
68 of 152